With native support, SystemC functions are executed directly on the CoMET6 simulation kernel, resulting in full IEEE 1666 SystemC compliance and ultra-fast simulation speed. CoMET6 direct mapping of OCP-IP TL2 constructs improves bus communications performance by 4x for models using OCP-IP TL2. The CoMET6 Eclipse framework, with help from strategic developers like IBM, Intel, Nokia and Wind River, is quickly becoming the de facto industry standard development platform and framework for embedded system design tools.
"OCP-IP has shipped many thousands of copies of our TLM work over the years and we are particularly proud of their quality and ongoing progression," said Ian Mackintosh, president OCP-IP. "CoMET6 direct mapping of OCP-IP TL2 constructs will further enhance communications performance for models using OCP-IP TL2 reducing time to market, development costs and risk."
Through Eclipse, CoMET6 supports customer-developed and third-party Eclipse plug-ins, allowing tighter integrations with customer-specific design tools and flows. Together these improvements deliver high performance and standards-based interoperability.
The CoMET6 virtual-platform editor (VPE), a platform entry and analysis user interface, speeds specification, configuration and debug of the virtual system prototype. VPE is a hierarchical block-based capability complementing existing tree-, table- and HTML-based interfaces.
CoMET6 supports Linux and has the same functionality, look and feel across Windows and Linux, allowing customers to select whichever operating system they prefer.
"CoMET6's mix of high performance, support for standards and interoperability, and new user interfaces enable VaST customers to achieve even greater levels of productivity," said Jeff Roane, VaST's vice president of marketing.
Multi-core systems on chip (SoCs) are quickly becoming the norm in wireless and consumer applications. In wireless, for instance, the combination of ARM and StarCore processors is very prevalent. CoMET6 features run-time improvements for multi-core design that deliver linear run-time performance vs. the number of cores.
With CoMET6 designers can accurately analyze and optimize architecture and software for power. With battery life a critical constraint for consumer and wireless devices, power must be managed at each stage of the design flow. CoMET6 provides a customizable cycle-accurate event-based power calculator that enables power analysis and optimization of both the architecture and software.
CoMET6 enables virtual system prototypes to drive hardware implementation and verification through HDL co-simulation. The initial release of CoMET6 supports Mentor Graphics ModelSim(R) VHDL; subsequent releases will support additional simulators such as ModelSim Verilog, Cadence Incisive(TM) HDL Simulator, and Synopsys VCS(R).
CoMET6 is available now, in limited production and will be generally available on April 27th. CoMET6 will be demonstrated at the Design Automation and Test Conference in Nice France, April 16-20 in Booth R-12.
VaST provides tools and models for embedded system design. Users create a cycle-accurate software model of a system that operates at near real-time speeds under actual software loads. VaST's solutions are OSCI SystemC-compliant and are used for software development, architecture analysis and system verification. VaST solutions dramatically improve time to market and quality while reducing development costs and risk.
Current customers include worldwide leaders in semiconductors, automotive electronics, wireless devices, and consumer electronics. VaST is headquartered in Sunnyvale, California with sales and support offices worldwide. For more information, visit www.vastsystems.com.
VaST in the USA
Lou Covey, 650-366-8212 x 203
VaST in Europe
Jean-Marc Talbot, +33 4 56 38 51 23