"Columbus-AMS with Speedview allows designers to extract and analyze power rails in existing LVS flows using an up-to-date, high-capacity viewer for analyzing electromigration and voltage-drop problems," said Dr. Rob Mathews, Sequence vice president of extraction products. "Unlike general-purpose viewers, Speedview directly assists in finding, visualizing, and deciding how to fix EM violations and voltage drop in a design."
Speedview-AMS Feature Summary
Speedview-AMS uses geometric and parasitic information directly from Columbus-AMS, overlaying analysis results from external simulation. Key features and benefits are:
-- Visualize and quickly isolate electromigration and voltage-drop problems using tailored, geometric displays of per-net parasitic and analysis data
-- Find every violation, and document how to fix it, using interactively controlled violations displays with search, annotation, and save functions
-- Diagnose voltage drop with an uncluttered, parasitic-only view showing complete parasitic and device properties
-- Visualize overall trends or fine details of analytic data using interactively controlled color maps of rail polygons
The Columbus extraction product family is part of Sequence's high-performance, low-power design lineup which also includes PowerTheater, CoolPower, CoolCheck, and CoolTime, providing RTL and full-chip power analysis and optimization tuned to the design challenges facing engineers at 90nm and below. Columbus-AMS is both a foundation for the company's RTL-to-silicon, power-aware design tools for SoCs and the industry's leading RLC parasitic extraction tool for high-performance digital and analog/mixed-signal designs.
Columbus-AMS is fully integrated with Cadence's Analog Design Environment, and operates with Calibre, Diva, and Assura LVS tools for total flow compatibility in a familiar and trusted environment. More than 100 Sequence customers have achieved successful, high-performance tapeouts using Columbus-AMS extraction. For more information: http://www.sequencedesign.com/2_solutions/rlc_extraction.html.
Price for a one-year TBL is $91,500 for Columbus-AMS with Speedview-AMS EM/V-drop analysis. The package includes integration with Synopsys's HSIM-PWRA (Lexsim) simulator.
Sequence Design accelerates the ability of SoC designers to bring high-performance, power-aware ICs quickly to market. Sequence's power and signal-integrity software solutions give customers the competitive advantage necessary to excel in aggressive technology markets, despite the demanding complexity and time-to-market issues of nanometer design. Sequence serves over 150 customers worldwide, in application segments such as consumer, wireless, mobile computing, multimedia, cell phones, digital cameras, network-on-chip processors, and other power-sensitive markets. The company was named by Reed Electronics as one of the top 10 companies to watch in the electronics industry, and was recently selected as one of high-tech's Top 100 companies by siliconindia magazine. Sequence has worldwide development and field-service operations and is privately held. Please see sequencedesign.com.
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Sequence Public Relations Jim Lochmiller, 541-821-3438 Email Contact