eSilicon used the Talus Automated Chip Creation(TM) capability and distributed implementation to efficiently iterate the floorplanning, and place and route tasks to meet the area and performance requirements of the chip. As future revisions of the design become available, the Talus capability will generate multiple floorplans and complete place and route and timing fixes to get the best area utilization and performance. By augmenting traditional floorplanning iterations and reducing implementation time, eSilicon will significantly accelerate its design cycle and reduce development costs. Talus' distributed implementation of the design, which employs multiple computers throughout the flow, enables quick turnaround and feedback to designers.
"The Talus' Automated Chip Creation methodology, which was run in parallel with our traditional floorplanning and place and route flow, was able to turn a full physical design spin for this very large design in two to three days, as opposed to multiple days or weeks," said Hao Nham, vice president and general manager of Design Services at eSilicon. "This dramatic improvement in turnaround time will enable us to evaluate different design trade-offs such as die size and utilization, and debug issues such as timing constraints even more efficiently."
"eSilicon manufactures and designs custom chips for leading electronics companies, consistently delivering first-pass silicon success and rapid time-to-volume," said Kam Kittrell, general manager of Magma's Design Implementation Business Unit. "We're pleased that the company is utilizing the revolutionary Talus platform, which allows eSilicon to accommodate late-arriving RTL or constraint changes from customers with no impact on their schedule."
Talus offers unequaled automation and virtually unlimited capacity, providing a complete RTL-to-tape-out platform that concurrently analyzes and optimizes timing, area, power, signal integrity and yield. It enables Automated Chip Creation, a new methodology for IC implementation that drastically improves engineering productivity. Talus' Automated Chip Creation methodology enables designers to create either preliminary or final-quality layouts, physically flat or hierarchically, in just a few hours and for any size design. The process can begin with as little as 10 percent of the design RTL available. With fast and accurate feedback early in the cycle, users can identify the top-level timing constraints that meet block timing budgets, enabling them to avoid timing violations later during chip integration. With each subsequent RTL change, Talus automatically creates multiple floorplans, allowing designers to see in real-time the impact of those changes on chip size.
eSilicon designs and manufactures custom integrated circuits for leading electronics companies. The company serves both system OEMs and fabless semiconductor companies who apply custom silicon to create innovative new products. eSilicon designs and ships custom chips for a wide variety of markets and applications, including high-volume MP3 players, home gateways, complex storage networks and high-speed communications devices.
Established in 2000 and led by a team of industry veterans, eSilicon is a pioneer and award-winning market leader, widely recognized for innovation and operational excellence. The company combines in-house design and manufacturing expertise to provide customers with a low-cost and lower-risk, path to best-in-class technology. eSilicon is headquartered in Sunnyvale, CA, with offices in Allentown, PA; New Providence (Murray Hill), NJ; Shin Yokohama, Japan; and Bucharest, Romania. For more information, please visit www.esilicon.com.
Magma's software for integrated circuit (IC) design is recognized as embodying the best in semiconductor technology. The world's top chip companies use Magma's EDA software to design and verify complex, high-performance ICs for communications, computing, consumer electronics and networking applications, while at the same time reducing design time and costs. Magma provides software for IC implementation, analysis, physical verification, characterization and programmable logic design, and the company's integrated RTL-to-GDSII design flow offers "The Fastest Path from RTL to Silicon"(TM). Magma is headquartered in Santa Clara, Calif. with offices around the world. Magma's stock trades on Nasdaq under the ticker symbol LAVA. Visit Magma Design Automation on the Web at www.magma-da.com.
Magma is a registered trademark, and Talus, Automated Chip Creation and "The Fastest Path from RTL to Silicon" are trademarks of Magma Design Automation. eSilicon is a registered trademark of eSilicon Corporation. All other product and company names are trademarks and registered trademarks of their respective companies.
Except for the historical information contained herein, the matters set forth in this press release, including statements that Talus' automated floorplanning capability quickly generated multiple floorplans and then implemented them to get the best area and utilization, and about the performance of Magma software are forward-looking statements within the meaning of the "safe harbor" provisions of the Private Securities Litigation Reform Act of 1995. These forward-looking statements are subject to risks and uncertainties that could cause actual results to differ materially including, but not limited to Magma's ability to keep pace with rapidly changing technology; and its products' abilities to produce desired results; and Skyworks' decision to continue using the software. Further discussion of these and other potential risk factors may be found in Magma's public filings with the Securities and Exchange Commission ( www.sec.gov). Magma undertakes no additional obligation to update these forward-looking statements.
Magma Design Automation Inc. Monica Marmie, 408-565-7689 Email Contact or eSilicon Corporation Julie Seymour, 408-616-4655 Email Contact