Sequence PowerTheater Meets Sub-90nm Challenges For Mobile, Wireless; Slash Power Budgets With RTL Analysis

SANTA CLARA, Calif.—(BUSINESS WIRE)—Feb. 28, 2006— Sequence Design, the EDA low-power design technology leader, announces the next generation of its PowerTheater design suite to meet the demanding requirements for wireless, mobile, and large SoC designs below 90nm.

"Below 90nm, power dominates all other issues," said Vic Kulkarni, Sequence president and CEO. "PowerTheater is unique in its ability to analyze and optimize power at RTL, where decisions are made that determine 80 percent of a chip's total power budget, leading to better results and faster time to market."

PowerTheater is the industry standard for low-power design at RTL, with capabilities ranging from early RTL analysis to full-chip power estimates for today's largest designs. PowerTheater allows users to begin the design process with a firm handle on power budgets - before synthesis, when it is too late to optimize - and complete projects with verified results that correlate to silicon. It also allows designers to inspect and probe the precise areas where power is being wasted. New PowerTheater features enhance its RTL power analysis capabilities and usability:

-- Peak Power Analysis: Analyzing power peaks in RTL cuts designer analysis time for dynamic voltage drop vector selection by 90 percent. Knowledge of peak power is essential for understanding power grid and power supply requirements, and early RTL analysis prevents grid underdesign which can lead to catastrophic chip failure, and wasteful overdesign which impacts area.

-- Power Gating: Performs "power gating aware" RTL power estimation to help designers plan their power gating strategies, including defining the optimal power regions and associated sleep signals, and determining the best assignment of retention flops and latches.

-- Voltage Domains: Expanded support for RTL and gate-level power estimation of multiple voltage domains, which are increasingly used in SoC designs to lower power consumption.

-- Support for SystemVerilog: The popular international standard extends Verilog to address the growing complexity of electronic system and semiconductor designs, and increases these capabilities for system-level design and analysis.

Among its many industry-leading features, PowerTheater provides gate-level, time-based power analysis, providing a view of power dissipation as a function of time within a waveform display, and has strong links to CoolTime and other dynamic voltage drop tools for generating state information based on highest activity or highest power. For complete information: http://www.sequencedesign.com/2_solutions/2b_power_theater.html.

About Sequence

Sequence Design accelerates the ability of SoC designers to bring high-performance, power-aware ICs quickly to market. Sequence's power and signal- integrity software solutions give customers the competitive advantage necessary to excel in aggressive technology markets, despite the demanding complexity and time-to-market issues of nanometer design. Sequence serves 9 of the top 10 semiconductor companies and over 130 customers worldwide, in application segments such as consumer, wireless, mobile computing, multimedia, cell phones, digital cameras, network-on-chip processors, and other power-sensitive markets. The company was named by Reed Electronics as one of the top 10 companies to watch in the electronics industry, and was recently selected as one of high-tech's Top 100 companies by siliconindia magazine. Sequence has worldwide development and field-service operations and is privately held. Please see sequencedesign.com

All trademarks mentioned herein are the property of their respective owners.



Contact:
Sequence Public Relations
Jim Lochmiller, 541-821-3438

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