Technical Paper on ESL Synthesis to be Presented at DVCon 2006; Case Study Showcases Bluespec Methodology for Processors

WALTHAM, Mass.—(BUSINESS WIRE)—Feb. 22, 2006— Bluespec Inc. announced today that a technical paper on electronic system level (ESL) synthesis will be presented at Design and Verification Conference and Exhibition (DVCon 2006) Thursday, February 23, at the Doubletree Hotel, San Jose, Calif.

The paper titled, Technical Session 3: A False Dichotomy? High-Level Synthesis and Control: A CPU Case Study, will be presented at 11 a.m. during Technical Session 3 (

More information on DVCon 2006 can be found at:

For more details, contact George Harper, vice president of Bluespec, who can be reached at (781) 250-2200 or via email at Or, visit the Bluespec website located at:

About Bluespec

Bluespec Inc. manufactures an industry standards-based Electronic Design Automation (EDA) toolset that significantly raises the level of abstraction for hardware design while retaining the ability to automatically synthesize high-quality RTL, without compromising speed, power or area. The toolset, the only one focused on control and complex datapaths, allows ASIC and FPGA designers to reduce design time, bugs and re-spins that contribute to product delays and escalating costs. More information can be found on or by calling (781) 250-2200.

Copyright 2005 Bluespec, Inc. Bluespec is a trademark of Bluespec, Inc. All other brands, products, or service names may be trademarks or service marks of the companies with which they are associated.

Bluespec Inc.
George Harper, 781-250-2200

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Public Relations for Bluespec
Nanette Collins, 617-437-1822

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