EVE Adopts Verific HDL Component Software; Verific's Tools Serve as Front End for EVE's ZeBu Hardware-Assisted Verification Platform

ALAMEDA, Calif.—(BUSINESS WIRE)—Dec. 8, 2005— Verific Design Automation today said that EVE (Emulation and Verification Engineering) has licensed its hardware description language (HDL) Component Software to serve as the register transfer level (RTL) front end for EVE's hardware-assisted verification platform.

EVE has integrated Verific's C++ source code-based parsers, analyzers and elaborators for Verilog, SystemVerilog and VHDL with its ZeBu (for Zero Bugs), a high-performance emulation platform that enables simultaneous hardware and embedded software verification. EVE's fully automated compiler parses RTL code and partitions it for parallel synthesis, dramatically accelerating set-up time prior to emulation.

Dr. Luc Burgun, EVE's chief executive officer and president, remarks: "Verific's HDL Component Software has become the industry standard and for good reason. The software is first rate and the support is outstanding. Verific is an excellent development partner."

"EVE stands out for its continuing innovation and creativity," adds Michiel Ligthart, Verific's chief operating officer. "It sets the pace for verification advances by expanding the technical capabilities of emulation and we're delighted to support its achievements."

About Verific Design Automation

Verific Design Automation was founded in 1999 by electronic design automation (EDA) industry veteran Rob Dekker. It develops and sells C++ source code-based SystemVerilog, Verilog and VHDL front ends -- parsers, analyzers and elaborators -- as well as a generic hierarchical netlist database for EDA applications. Verific's technology has been licensed in many applications, combined shipping more than 45,000 end-user copies. Corporate headquarters is located at: 1516 Oak Street, Suite 115, Alameda, Calif. 94501. Telephone: (510) 522-1555. Facsimile number: (510) 522-1553. Email: info@verific.com. Website: http://www.verific.com.

Verific Design Automation acknowledges trademarks or registered trademarks of other organizations for their respective products and services.



Contact:
Public Relations for Verific
Nanette Collins, 617-437-1822

Email Contact

Rating:


Review Article Be the first to review this article
Aldec

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Diversity: Really, who cares
More Editorial  
Jobs
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
DDR 3-4-5 Developer with VIP for EDA Careers at San Jose, CA
Senior Methodology Automation Engineer for EDA Careers at San Jose, CA
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
Proposal Support Coordinator for Keystone Aerial Surveys at Philadelphia, PA
Upcoming Events
11th International Conference on Verification and Evaluation of Computer and Communication Systems at 1455 DeMaisonneuve W. EV05.139 Montreal Quebec Canada - Aug 24 - 25, 2017
The Rise of Mechatronics at Dassault Systèmes San Diego 5005 Wateridge Vista Drive San Diego CA - Sep 12, 2017
The Rise of Mechatronics at Buca di Beppo - Pasadena 80 West Green Street Pasadena CA - Sep 13, 2017
S2C: FPGA Base prototyping- Download white paper



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy