Infineon Technologies AG
Paper by L. Dilillo, P. Girard, S. Pravossoudovitch, A. Virazel, and M. Bastian.
Resistive-open defects appear more and more frequently in VDSM technologies. In this paper we present a study concerning resistive-open defects in the core-cell of SRAM memories. The first target of this work is a comparison of the effect produced by resistive-open defects in the 0.13 µm and 90 nm core-cell. We show that the 90 nm core-cell is more robust than the 0.13 µm core-cell in presence of resistive-open defects. On the other hand we show that dynamic faults are most likely to occur in the 90 nm than in 0.13 µm core-cell. Finally we propose a unique March test solution that ensures the complete coverage of all the extracted fault models for both technologies.