MTCMOS power gating is a circuit technique for reducing leakage power by 10X to 100X, but is difficult to implement without advanced design automation. CoolPower completely automates the design and implementation of MTCMOS power-gating with minimal effects upon circuit area, circuit performance, and design time.
CoolPower also automatically repairs voltage drop problems by modifying the layout to move dynamic voltage drop aggressors to less critical positions and by inserting, sizing, and optimizing the placement of decoupling capacitors. CoolPower has achieved, on customer designs with decoupling capacitors inserted by other tools, improvements of 47mV in worst-case voltage drop, as well as similar worst-case voltage drop using only 15 percent of the previously inserted decoupling capacitors. The reduction in decoupling capacitor usage reduces leakage currents and increases manufacturability. CoolPower incorporates PhysicalStudio(TM) technologies for timing and SI analysis and optimization ensuring that all CoolPower optimizations are free of timing and signal-integrity problems, thus reducing design closure time by preventing multiple loops between various timing, SI, and power tools.
"MTCMOS power-gating is one of the most important techniques for leakage power reduction, but it is very difficult to implement efficiently," according to Dr. Anantha Chandrakasan, Professor of Electrical Engineering at MIT. "CoolPower's power-gating optimizations and electrical rules checks break new ground in design automation and produce area-efficient and leakage-efficient designs."
"This is the premier tool for optimizing power during physical IC implementation," said Jerry Frenkil, Sequence chief technology officer and vice president of advanced development. "CoolPower is the first to automate many of the most effective but time-consuming and error prone tasks in low power design."
MTCMOS Power Gating Optimization
-- Fully automated optimization flow
-- Set of pre-route optimization methods and post-route corrections
-- Minimal to no impact on area and timing
-- Meets all timing and SI constraints
Voltage Drop Optimization
-- Fully automated optimization flow
-- Decoupling capacitor insertion
-- Cell movement to reduce voltage drop
-- Concurrent optimization across multiple modes of operation
-- Voltage drop optimizations meet all timing and SI constraints
Static and Dynamic Power Reduction
-- Multi-Vt cell swapping for leakage reduction
-- Cell sizing for dynamic power reduction
-- Power optimizations meet all timing and SI constraints
Timing and Signal-Integrity Optimization
-- Coupling delay, glitch optimization
-- Timing optimization
-- Hierarchical design flow
For More Information and Data Sheet
CoolPower will ship August 2005. North America pricing begins at $150,000 for a one-year license. For more information: email@example.com.
Sequence Design, Inc. enables system-on-chip designers to bring higher-performance and power-aware nanometer integrated circuits quickly to fabrication. Sequence's power and signal-integrity software give its more than 125 customers the competitive advantage necessary to excel in aggressive technology markets, despite demanding complexity and time-to-market issues of nanometer design.
Sequence has worldwide development and field service operations. The company was recently named by Reed Electronics as one of the top 10 companies to watch in the electronics industry. Sequence is privately held. Sequence is a member of the ARM/Artisan Connected Community(TM), Cadence Design Systems' Connections(TM), Mentor Graphics' Open Door(TM), and Virage Logic VIP(TM) partnership programs. Additional information is available at sequencedesign.com.
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Sequence Public Relations Jim Lochmiller, 541-821-3438 Email Contact