Cadence Accelerates Time to Market for Stretch; Comprehensive Cadence Encounter Digital IC Design Solution Helps Startup Implement High Performance Configurable Processor

SAN JOSE, Calif.—(BUSINESS WIRE)—Aug. 30, 2004— Cadence Design Systems, Inc. (NYSE: CDN)(Nasdaq: CDN) today announced it has helped enable Stretch Inc. to meet an aggressive time-to-market goal for a high-performance software-configurable processor design. Stretch benefited from the strength of a comprehensive Cadence Digital IC design flow and libraries from Taiwan Semiconductor Manufacturing Company (TSMC), to mitigate its design risks and ensure high quality of silicon (QoS) through improved area and performance.

"Cadence was instrumental in our successful effort to implement this tapeout on schedule," said Wayne P. Heideman, vice president of engineering at Stretch, provider of a family of software-configurable processors. "The Cadence Encounter platform's world-class technology and methodologies, combined with the innovative Cadence VCAD service model and the TSMC-developed libraries, gave us the edge we needed to minimize our design time and achieve the QoS we required."

Drawing on the Cadence(R) Encounter(TM) digital IC design platform, Cadence engineering services worked closely with Stretch as it took the design from netlist to GDSII. The breakthrough, 4-million-plus-gate design featured multiple clocks, custom programmable data paths, and extensive high-speed I/Os. It was targeted to TSMC's 0.13-micron process and employs TSMC standard cell libraries available with the Cadence Encounter design platform.

"Through our collaboration with Cadence, TSMC is able to offer customers like Stretch a variety of process-tuned libraries for high-speed and low-power designs," said Edward Wan, senior director of design services marketing for TSMC. "Using the TSMC-developed libraries as an integrated part of the Cadence Encounter Platform provided Stretch with an accelerated path to volume silicon."

"Integration of the Cadence Encounter IC digital implementation system, TSMC's silicon-validated libraries, and Cadence engineering services, gives customers a real time-to-market advantage," said Lavi Lev, executive vice president and general manager of Cadence Design Systems' Implementation Division. "Our VCAD service model provides a virtual CAD and collaborative design environment in which our customers work with Cadence and take advantage of our specialized expertise to achieve their design goals."

About Cadence

Cadence is the world's largest supplier of electronic design technologies and engineering services. Cadence products and services are used to accelerate and manage the design of semiconductors, computer systems, networking equipment, telecommunications equipment, consumer electronics, and other electronics based products. With approximately 4,850 employees and 2003 revenues of approximately $1.1 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif., and trades on both the New York Stock Exchange and Nasdaq under the symbol CDN. More information is available at www.cadence.com.

Cadence and the Cadence logo are registered trademarks and Encounter is a trademark of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.



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