Justin Refice Receives Accellera Systems Initiative Technical Excellence Award

NVIDIA’s Refice will be recognized for his contributions to UVM at DVCon on March 2, 2015

ELK GROVE, Calif. — (BUSINESS WIRE) — February 25, 2015 — Accellera Systems Initiative (Accellera) announced today that Justin Refice, a member of the Universal Verification Methodology Working Group (UVM WG), is the recipient of the fourth annual Accellera Technical Excellence Award. The award is being presented at the Design and Verification Conference and Exhibition (DVCon) on Monday, March 2, 2015 during the Accellera Day luncheon from 12:00-1:30pm at the DoubleTree Hotel in San Jose, California. The award recognizes the outstanding achievements Mr. Refice has made to the organization's UVM standardization efforts, including his significant contributions to the development of UVM 1.2, which improves interoperability and reduces the cost of IP development and reuse for each new project.

“Since the formation of the UVM Working Group, tremendous strides have been made to improve SoC productivity throughout the industry,” said Karen Pieper, Accellera Technical Committee Chair. “The leaders in the standards community play an integral part in not only developing standards, but also raising awareness and acceptance of the standards they champion. Accellera has been recognizing these leaders with the Technical Excellence Award since 2012, and we are pleased to announce Justin as the winner of the 2015 award.”

“Because of his strong technical leadership skills, his impact on the team, and the significant effort he has put into making UVM accepted among the industry worldwide, Justin is well-deserving of this award,” stated Tom Alsop, co-chair of the UVM WG. “He has played a vital role in the progression and success of the UVM standard.”

"I’m honored to receive this prestigious award from my peers,” said Mr. Refice, who serves as a Senior Verification Engineer at NVIDIA. "The development of UVM has truly been a collaborative effort of the UVM WG. I am privileged to be able to work with such an outstanding, skilled group of individuals. It’s gratifying to see the progression of UVM in the industry and the benefits being realized by the user community.”

Mr. Refice has been a member of the UVM WG since 2010. He has developed major components for UVM 1.2 and has been very active in its definition. During the standardization process for UVM 1.2, he focused most of his efforts to clean up the specification as well as effect functional enhancements and optimizations for the reference implementation. In his work at NVIDIA, Mr. Refice is responsible for the development and integration of verification methodology within the GPU organization. Previously he has held contributor positions at Advanced Micro Devices and Unisys. He holds a Bachelor of Science degree in Computer Engineering from Drexel University in Philadelphia, PA.

About the Accellera Technical Committee

Accellera's Technical Committee oversees 17 Working Groups that produce effective and efficient Electronic Design Automation (EDA) and Intellectual Property (IP) standards for today's advanced IC designs. Participants include member companies and industry contributors. Technical contributors typically have many years of practical experience with IC design and developing and using EDA tools. For a list of Accellera Working Groups, please click here.

About Accellera Systems Initiative

Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote and advance system-level design, modeling and verification standards for use by the worldwide electronics industry. The organization accelerates standards development and, as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit www.accellera.org. Find out more about membership.

About DVCon

DVCon is the premier conference and exhibition for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an organization focused on the creation and adoption of EDA and IP standards. For more information, please visit www.accellera.org. For more information about DVCon, please visit www.dvcon.org. Follow @dvcon on Twitter or to comment, please use #dvcon.

Accellera, Accellera Systems Initiative and UVM are trademarks of Accellera Systems Initiative Inc. All other trademarks and trade names are the property of their respective owners.


Public Relations for Accellera Systems Initiative
Barbara Benjamin, +1-503-209-2323
Email Contact

Review Article Be the first to review this article
Featured Video
More Editorial  
Technical Support Engineer for EDA Careers at Freemont, CA
Senior FPGA Designer for Fidus Electronic Product Development at Fremont, CA
ASIC Design Engineer for Ambarella at Santa Clara, CA
ASIC Design Engineer 2 for Ambarella at Santa Clara, CA
Engr, Elec Des 2 for KLA-Tencor at Milpitas, CA
Staff Software Engineer - (170059) for brocade at San Jose, CA
Upcoming Events
CDNLive Silicon Valley 2017 at Santa Clara Convention Center Santa Clara CA - Apr 11 - 12, 2017
10th Anniversary of Cyber-Physical Systems Week at Pittsburgh, PA, USA PA - Apr 18 - 21, 2017
DVCon 2017 China, April 19, 2017, Parkyard Hotel Shanghai, China at Parkyard Hotel Shanghai Shanghai China - Apr 19, 2017
Zuken Innovation World 2017 at Hilton Head Marriott Resort & Spa Hilton Head Island NC - Apr 24 - 26, 2017
S2C: FPGA Base prototyping- Download white paper

Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy