DVCon 2015 Announces Tutorial Proposals Deadline October 3

LOUISVILLE, Colo. — (BUSINESS WIRE) — September 17, 2014 — The 2015 Design and Verification Conference (DVCon), sponsored by Accellera Systems Initiative, is now accepting tutorial proposals for its conference to be held March 2-5 at the DoubleTree Hotel in San Jose, California. DVCon is seeking tutorial topics that are current, have a high-level of interest among the attendee base and offer strong continuing education content. Deadline for submissions is October 3rd, 2014.

DVCon is the premier conference for design and verification engineers of all experience levels. DVCon provides attendees with a program that is focused on the application of languages, tools and methodologies for the design and verification of electronic systems and integrated circuits. The primary focus of DVCon is on the practical use of specialized design and verification languages such as SystemC, SystemVerilog and e, assertions in SVA or PSL, as well as the use of AMS languages, design automation using IP-XACT and the use of general purpose languages C and C++.

Authors are asked to submit a short two to five paragraph abstract of the tutorial (1,000 words maximum). Tutorial sponsorships are available at the Gold or Silver levels. Over 300 qualified engineers attended the sponsored tutorials during DVCon 2015. Attendees are primarily designers of electronic systems, ASICs and FPGAs, as well as those involved in the research, development and application of EDA tools. More information about submitting a tutorial proposal can be found at www.dvcon.org/2014/call-for-tutorials.

For more information about DVCon, please visit www.dvcon.org. Follow @dvcon on Twitter or to comment, please use #dvcon. DVCon 2015 can also be followed on Facebook www.facebook.com/dvcon.

Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote and advance system-level design, modeling and verification standards for use by the worldwide electronics industry. The organization accelerates standards development, and as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit www.accellera.org.



Contact:

MP Associates, Inc.
Nannette Jordan, 303-530-4562
Email Contact
or
HighPointe Communications
Barbara Benjamin, 503-209-2323
Email Contact




Review Article Be the first to review this article

Aldec Simulator Evaluate Now

Featured Video
Jobs
RF IC Design Engineering Manager for Intel at Santa Clara, CA
Senior PIC Test Development Engineer for Infinera Corp at Sunnyvale, CA
Senior Formal FAE Location OPEN for EDA Careers at San Jose or Anywhere, CA
Design Verification Engineer for Cirrus Logic, Inc. at Austin, TX
Principal PIC Hardware Controls Engineer for Infinera Corp at Sunnyvale, CA
Upcoming Events
IC Open Innovation Panel During REUSE 2017 at Santa Clara Convention Center 5001 Great America Parkway Santa Clara CA - Dec 14, 2017
Essentials of Electronic Technology: A Crash Course at Columbia MD - Jan 16 - 18, 2018
Essentials of Digital Technology at MD - Feb 13 - 14, 2018
CST: Webinar series
DownStream: Solutions for Post Processing PCB Designs
TrueCircuits: UltraPLL



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise