Cadence DDR4 PHY IP Achieves 2667 Mbps Performance - Fastest in the Industry

Highlights:

SAN JOSE, Calif., Jan. 29, 2014 — (PRNewswire) —  Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that it has achieved 2667 Mbps performance on its DDR4 PHY Intellectual Property (IP) at 28nm, the highest known performance in the industry. Targeting server, networking and consumer applications, the Cadence® DDR4 PHY IP is a silicon-proven, robust and low-risk DDR PHY that has been verified with the Cadence DDR4 controller IP. DDR4 PHY IP has several significant advantages over DDR3, including greater reliability, reduced power, higher capacity, a more robust RAS (reliability, availability, and serviceability) feature, and better stacking capabilities for enterprise, micro-server, ultrathin and tablet markets.

"As DDR4 high-speed memories now become readily available, designers are looking for IP that can support 2667 Mbps," said Amjad Qureshi, senior group director, Cadence IP Group. "By providing both the DDR4 controller and the DDR4 PHY at such high speeds, Cadence gives designers the confidence and assurance that they can build next-generation systems which are faster, lower power and have more capacity."

DDR4 PHY IP is available now and for more information on DDR IP, please visit: http://ip.cadence.com/ipportfolio/memory-ip/ddr-lpddr#ddr-controllers

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.

© 2014 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.

For more information, please contact:
Cadence Design Systems, Inc.
408-944-7039
Email Contact

SOURCE Cadence Design Systems, Inc.

Contact:
Cadence Design Systems, Inc.
Web: http://www.cadence.com




Review Article Be the first to review this article
CST: Webinar October 19, 2017

Synopsys: Custom Compiler

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
DVCon Europe 2017: Munich and So much more
More Editorial  
Jobs
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
Field Application Engineer for Teradyne Inc at San Jose, CA
FPGA Engineer for Teradyne Inc at San Jose, CA
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
Upcoming Events
Preparing for the Cognitive Era: Education, Occupation and You at SJSU Student Union Theater 211 South 9th Street San Jose CA - Oct 18, 2017
11th International Symposium on Networks-on-Chip (NOCS 2017) at Seoul Korea (South) - Oct 19 - 20, 2017
15th IEEE/ACM ESTIMedia 2017 at Seoul Korea (South) - Oct 19 - 20, 2017
ESTIMedia 2017 at Seoul Korea (South) - Oct 19 - 20, 2017
CST: Webinar series



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise