Orora's Arana is the only post-layout verification solution that met STARC's criteria in cutting total turn-around time by half.
Shin-Yokohama, Japan/Issaquah, WA -– January 31, 2012 - Orora Design Technologies, Inc., (www.orora.com) a company focused on automating mixed-signal IC design and verification, today announced that STARC, the Japanese electronic design consortium, has selected Orora’s Arana as the post-layout mixed-signal design verification solution for Japanese semiconductor industry’s next-generation STARCAD-AMS Analog/Mixed Signal reference flow.
STARC (The Semiconductor Technology Academic Research Center) is a consortium founded in 1995 by leading Japanese semiconductor companies. STARC's mission is to contribute to the growth of the Japanese semiconductor industry by developing leading-edge SoC design technologies.
“The specific goal of STARCAD-AMS is to develop the next-generation analog and mixed-signal design flow to reduce turnaround time (TAT) by half for STARC member companies," said Kunihiko Tsuboi, Senior Manager of STARC's Development Department-2. “Post-layout design verification is the most time consuming part of the TAT, accounting about 30% or more. Furthermore, With next-generation analog and mixed-signal circuits being more sensitive to process, voltage and temperature (PVT) variations, and parasitic effects, the increased use of digital control for compensating analog circuitry imperfection and digital configuration for system-level programmability, we see that the time and cost for post-layout mixed-signal design verification are sky-rocketing.”
“We have identified automated behavioral model generation as the must have tool to address mixed-signal design verification. After extensive evaluation on a set of STARC benchmark circuits, we found that Orora’s Arana is the industry’s only viable automated behavioral model generation solution that meets all our strict criteria in terms of efficiency, accuracy, and easy of use.” Said Tatsuya Shirakawa, Researcher of STARC’s Mixed-Signal Design Group. “ For STARC motif benchmark, Arana can automatically generate all PVT-aware behavioral models from a post-layout netlist, and reduces the post-layout simulation time by more than 200 times with less than 1% accuracy loss. Furthermore, the total time for setting up and generating all the behavioral models is less than one hour, compared to the several weeks of manual effort that is otherwise required. It is well known that manually created models are hard to match the behavior of a netlist”.
“We are proud that Arana has been certified and selected by STARC based on a set of strict criteria”. Said Dr. Richard Shi, CEO of Orora Design Technologies, Inc. “We look forward to working with STARC and member companies in deploying Arana automated behavioral model generation solution for dramatic improvements in productivity in the verification, design, and reuse of mixed-signal integrated circuits”.
About Orora Design Technologies, Inc.
Orora Design Technologies, Inc. is focused on developing software tools and solutions for automating mixed-signal integrated circuit design and verification. Founded in 1998, the company is privately held. The company is headquartered in Issaquah, Washington. For more information, please visit www.orora.com.
Orora Design Technologies, Inc.
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