Faraday Adopts Legend's Toolset for Efficient Memory Characterization Based on Layout Extraction

SUNNYVALE, Calif. and SANTA CLARA, Calif., -- December 22, 2003 - Legend Design Technology, Inc., a leader in memory IP characterization and simulation, today announced that Faraday Technology Corporation (TAIEX: 3035), a leading fabless ASIC and IP provider, has adopted Legend's SpiceCut toolset to optimize the characterization process for Faraday's 4th generation memory compilers. Based upon layout-extracted circuits with resistors and capacitors, Legend's SpiceCut toolset produces simulation-efficient detailed critical-path circuits that enable Faraday's instance-based memory characterization task to be performed efficiently and accurately.

"Faraday's memory compiler products offer SoC designers high reliability, accuracy, and simulation coverage for SRAMs, Register Files and ROMs. To provide accurate simulation models, we use Legend's toolset, SpiceCut. It quickly produces critical-path circuits that reflect the reality of the silicon. We are committed to providing our SoC designers with quality IP and the means to achieve design success." said Eliot Chen, Director of IP Development Division, Faraday Technology Corporation.

"In our effort to achieve the best modeling accuracy, Faraday uses layout-extracted circuit data for instance-based characterization. To minimize layout extraction time without sacrificing accuracy, we have used multiple state-of-art methods including critical-nets and ring-shaped arrays, which are fully supported by Legend's SpiceCut toolset. The high throughput that SpiceCut enables makes it possible for each instance from Faraday's memory compilers to be characterized in real-time. Since the memory model reflects the reality of the silicon, we can provide superior quality and reliability to our customers." said Willis Shih, Senior Technical Manager of IP Development Division at Faraday Technology Corporation.

"Characterization of embedded memory is essential for silicon success of deep-submicron and nanometer SoC designs," said Dr. You-Pang Wei, President and Chief Executive Officer of Legend Design Technology. "The integrated characterization solution which combines Legend's toolset and Faraday's technology provides the highest quality memory models possible. We are pleased to be working closely with Faraday in meeting their needs for supporting customers' state-of-the-art designs."

About Legend Design Technology, Inc.
Legend Design Technology, Inc. is a leading provider of characterization and simulation software for memory IP (intellectual property) in SoC designs. With an emphasis on productivity and value, Legend's CharFlo-Memory! toolset which includes MSL, SpiceCut, MemChar and MSIM, revolutionizes the time consuming and error prone processes associated with characterization. SpiceCut can automatically build critical-path circuits to reduce simulation time for characterization, especially from post-layout extracted circuits with resistors and capacitors. MemChar can automatically characterize the memories and generate the 'true' timing and power models. MSL can automate memory characterization with customized setup of '.Lib-in and .Lib out'. MSIM is a characterization-oriented circuit simulator with post-layout RC reduction capability. With high accuracy, high speed and licensing models, MSIM can provide excellent price-performance.

For more information, visit www.LegendDesign.com

About Faraday Technology Corporation
Faraday is a leading silicon IP and fabless ASIC vendor. The company's broad IP portfolio includes 32-bit RISC CPUs, DSPs, PHY/Controllers for USB 2.0, Ethernet, and Serial ATA. With more than 500 employees and 2002 revenue of $96.2 million, Faraday is the largest fabless ASIC company in all Asia-Pacific. Headquartered in Taiwan, Faraday has service and support offices around the world, including the U.S., Japan, Europe, and China. For more information, please visit: http://www.faraday-usa.com


Review Article Be the first to review this article
CST: Webinar November 9, 2017


Featured Video
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Teklatech: Work smart, Not hard
More Editorial  
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
Upcoming Events
25th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2017) at Yas Viceroy Abu Dhabi Yas Marina Circuit, Yas Island Abu Dhabi United Arab Emirates - Oct 23 - 25, 2017
ARM TechCon 2017 at Santa Clara Convention Center Santa Clara CA - Oct 24 - 26, 2017
MIPI DevCon Bangalore 2017 at The Leela Palace Bengaluru India - Oct 27, 2017
MIPI DevCon Hsinchu City 2017 at Sheraton Hsinchu Hotel Taiwan - Oct 31, 2017
CST: Webinar series

Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise