Complex SoC Silicon and Software Design Costs Are Skyrocketing: 39% at 28nm node

Phoenix, AZ - August 16th, 2011 --  Today, everywhere we turn, we hear speakers give presentations at conferences and industry events despairing how the rise in silicon design costs hampers the semiconductor industry's growth path. As part of this problem, we now recognize that software design costs have eclipsed silicon design efforts and have become the largest portion of the SoC creation effort.


The design landscape has also changed due to rising design complexity and lengthening design cycle times, especially in the System-on-a-Chip (SoC) market. These changes are having an impact on the SoC Design Start market delaying and preventing, to some degree, the architectural refreshes silicon designers undertake periodically to bring their solutions into line with changing market requirements and rising customer expectations.


Semico Research Corp. has looked at these issues and their impact on SoC silicon and software design cost efforts and has encapsulated these changes and trends in a new report titled:   SoC Silicon and Software Design Cost Analysis: Changes in Perspective, SC102-11, August 2011.


Forecasts for SoC silicon design costs and software design costs are given from the 90nm node out through the 14nm node focusing on Advanced Performance Multicore SoCs, Value Multicore SoCs and Basic SoCs. Categories of effort with definitions for silicon and software designs are established with a forecast given at each node for the three types of SoC silicon.  A forecast for Derivative SoC design costs at the 28nm node from 2011 through 2016 is also given.


Some of the data discussed in 43 pages with 10 tables and 23 graphs are: 

  • Total SoC design costs increased 39% from the 32nm node to the 28nm node and are expected to increase 29% again at the 22nm node.
  • Total SoC silicon design costs increased 35.7% at the 28nm node.
  • Total Software design costs increased 42.5% at the 28nm node and are forecast to show a CAGR of 138.9% through the 14nm node.
  • Advanced Performance Multicore SoCs represent the most expensive silicon designs with Value Multicore SoCs and Basic SoCs exhibiting lower design costs.
  • Derivative SoC silicon designs allow designers to accomplish their solutions at a fraction of the cost compared to first time efforts at the same process node when it first becomes commercially available.
  • Costs for an Advanced Performance Multicore SoC design, continuously done at the 45nm node, will experience a negative CAGR of 12.5% by the time the 14nm process geometry becomes commercially available, showing that subsequent designs at the same node become less expensive over time.
  • 28nm silicon with a $20.00 ASP is required to ship 6.521M units to reach the breakeven point.
  • Discussion of initiatives by EDA vendors to create tools allowing software designers to reduce design costs and more fully integrate their efforts with silicon designers.

A great deal of effort today is focused on understanding trends for SoC silicon and software design costs, so that SoC designers and their management can plan their design efforts accordingly.  This Semico Research Corp. report on SoC silicon and software design costs provides needed data points to enhance this planning process and create a 'big picture' view of how these costs and trends interact, and where they are headed in the near future.

Review Article Be the first to review this article

Featured Video
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Simon Davidmann: A re-energized Imperas Tutorial at DAC
Peggy AycinenaIP Showcase
by Peggy Aycinena
ARM: A Gnawing Sense of Unease
More Editorial  
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
LVS for PDK Design Engineer SILICON VALLEY for EDA Careers at San Jose, CA
DDR 3-4-5 Developer with VIP for EDA Careers at San Jose, CA
Upcoming Events
11th International Conference on Verification and Evaluation of Computer and Communication Systems at 1455 DeMaisonneuve W. EV05.139 Montreal Quebec Canada - Aug 24 - 25, 2017
DVCon India 2017, Sept 14 - 15, 2017 at The Leela Palace Bengalore India - Sep 14 - 15, 2017
SMTA International 2017 at Rosemont IL - Sep 17 - 21, 2017
S2C: FPGA Base prototyping- Download white paper

Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy