Xilinx Discusses 3-D IC Design Methodologies, Design Tools, and FPGAs in Embedded Systems at DAC 2011

SAN JOSE, Calif., June, 1, 2011 — (PRNewswire) — Innovations in 3-D IC Design, new FPGA-based processing technologies for embedded systems, IP use and the latest in design tool support will be among the key topics presented by Xilinx, Inc. (NASDAQ: XLNX) at the Design Automation Conference (DAC) in San Diego from June 5 - 9, 2011. Xilinx CTO and Senior Vice President, Ivo Bolsens, will be among the executives participating in DAC's first Embedded Systems and Software Executive Day, as well as participate in a Pavilion Panel on 3-D IC designs. In addition to Bolsens' speaking engagements, Xilinx technical experts will participate in a number of panels and workshops, where attendees will learn more about FPGAs in embedded systems, support for standards promoting IP use and reuse, EDA industry trends, and the implementation of real-time systems using FPGAs.

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Design Automation Conference (DAC) 2011


San Diego Convention Center, San Diego, CA


June 5 - 9, 2011

Pavilion Panel

Monday, June 6

10:30 a.m.11:15 a.m., Booth #3421

3-D IC: Myth of Miracle?

With fewer companies justifying the costs of building ASICs and ASSPs using leading-edge process technologies, many companies are considering implementing their next designs using 3-D technologies instead of monolithic die. Ivo Bolsens will participate in this panel to share what Xilinx has learned about the tool, methodology, and infrastructure challenges of 3-D IC design through its own experience developing its Stacked Silicon Interconnect Technology.

Embedded Systems and Software Executive Day – Session 1

Wednesday, June 8

9:00 a.m.10:30 a.m., 32AB

Embedded Systems and Software Meet Hardware

Bolsens will also be among the top industry executives discussing the optimization of embedded operating systems, system architecture for future embedded products, application-specific architectures based on embedded processors and technical/business decision making by program developers.

Technical Panels

Tuesday, June 7

1:00 p.m.1:45 p.m., Booth #3421

C-to-FPGA Tools: Ready for the Mass Market?

Publisher of Xilinx's Xcell Journal, Mike Santarini, has set up a panel discussing FPGA market expansion. Moderated by Kevin Morris of Techfocus Media, the panel will discuss how a growing number of embedded designers and algorithm developers are using FPGAs for their designs and evaluate current C-to-FPGA tools that support these designs. The panel will also explore what FPGA and EDA vendors are doing to serve this broad user base.

Wednesday, June 8

9:15 a.m.10:15 a.m., Booth #3421

Town Hall: What EDA Isn't Doing Right

Santarini is also running a panel on the EDA industry with Lanza TechVentures Managing Director, Lucio Lanza. This panel of tool and IP users will examine what the EDA industry could do to better serve customers and move to a brighter future.

Wednesday, June 8

4:00 p.m.4:45 p.m., Booth #3421

IP and FPGAs: Where's My Free Lunch?

Xilinx Senior Manager of IP Marketing, Ron Digiuseppe, will share his insight on IP and FPGAs. The panel will discuss how IP blocks are growing in strategic importance and how IP stimulates innovation and drives new business models.


Sunday, June 5

2:30 p.m.3:15 p.m., 30C

DAC Workshop on Design, Analysis, and Implementation of Real-Time Systems with Time-Triggered and Event-Triggered Applications

Xilinx DSP Researcher, Stephen Neuendorffer, will participate in a panel that will discuss industrial case studies, models of computation, analysis methodologies, and integrated development platforms for mix-triggered systems.

Colocated Workshops

Sunday, June 5

11:00 a.m.11:15 a.m., 7AB

High-Level Synthesis for Systems in FPGAs

As part of the ESLsyn workshop, Neuendorffer will be giving a presentation on high-level synthesis for systems in FGPAs and how FPGAs can become powerful C programmable platforms.

Monday, June 6

11:00 a.m.12:00 p.m., 7AB

ESL Synthesis? Get Real!!

In another ESLsyn workshop, Neuendorffer and other panelists will weigh the pros and cons of ESL Synthesis technology being useful for realistic designs in the foreseeable future, its potentials, and trends.

Tuesday, June 7

2:00 p.m.4:00 p.m., 26AB

Accellera IP-XACT Seminar

Xilinx Product Marketing Manager of AXI, DSP IP and CORE Generator, Vinay Singh, will present a 10 minute overview of how Xilinx has adopted IP-XACT. This seminar is open to all DAC attendees and will cover an ecosystem overview, IP interfaces, IP architecture, parameterization and configurations, generators, and a comprehensive introduction to the IEEE-1685 standard.

About Xilinx

Xilinx is the world's leading provider of programmable platforms. For more information, visit: http://www.xilinx.com/.


Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners.


Bruce Fienberg


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Xilinx, Inc.
Web: http://www.xilinx.com

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