Media Alert: Sidense Exhibiting and Presenting at Design Automation Conference

OTTAWA and SANTA CLARA, CA -- (MARKET WIRE) -- Jun 01, 2011 --


What
Sidense at the Design Automation Conference (DAC)

IP Talks! at the ChipEstimate.com Booth #1731 (Mon. through Wed., June 6-8)
Sidense will be making a presentation, "Sidense OTP -- the key ingredient for silicon success," at the following times:

  • Monday at 3:30PM
  • Tuesday at 2:30PM
  • Wednesday at 2:30PM

In the GLOBALSOLUTIONS Booth #1517 (Mon. through Wed., June 6-8)
Sidense will be exhibiting in the GLOBALFOUNDRIES GLOBALSOLUTIONS booth throughout exhibit hours Monday through Wednesday and presenting at the following time:

  • Tuesday at 11:30AM

Where
Design Automation Conference (DAC)
San Diego Convention Center
San Diego, California

About Sidense
Sidense Corp. provides secure, very dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes with no additional masks or process steps required and no impact on product yield. The Company's innovative one-transistor 1T-Fuse™ architecture provides the industry's smallest footprint, most reliable and lowest power Logic Non-Volatile Memory (NVM) IP solution. With over 70 patents granted or pending, Sidense OTP provides a field-programmable alternative solution to Flash, mask ROM and eFuse in many OTP and MTP applications.

Sidense SiPROM, SLP and ULP memory products, embedded in over 160 customer designs, are available from 180nm down to 40nm and are scalable to 28nm and below. The IP is offered at and has been adopted by all top-tier semiconductor foundries and selected IDMs. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, WHDI, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, please visit www.sidense.com.

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For more information or to schedule a meeting with Sidense please contact:

Jim Lipman
Sidense

Email Contact
925-606-1370 





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