Sidense's SiPROM, ULP and SLP families of OTP macros are available for top-tier silicon foundry and IDM processes in several configurations ranging from 16 bits up to 512 Kbits, supporting word widths up to 128 bits. Customers designing chips with Sidense memory for GLOBAL FOUNDRIES processes are using the Company's OTP macros in densities from 64 bits to 128 Kbits.
"We are seeing a rapidly increasing demand for qualified OTP memory IP over a wide range of process nodes," said Todd Humes, Vice President of R&D at Sidense. "Through close cooperation with GLOBALFOUNDRIES we are able to supply our customers with a broad range of OTP macros at several popular nodes to meet their embedded non-volatile storage requirements and help give them a competitive edge."
About Sidense Corp.
Sidense Corp. provides secure, very dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes with no additional masks or process steps required and no impact on product yield. The Company's innovative one-transistor 1T-Fuse architecture provides the industry's smallest footprint, most reliable and lowest power Logic Non-Volatile Memory (NVM) IP solution. With over 70 patents granted or pending, Sidense OTP provides a field-programmable alternative solution to Flash, mask ROM and eFuse in many OTP and MTP applications.
Sidense SiPROM, SLP and ULP memory products, embedded in over 150 customer designs, are available from 180nm down to 40nm and are scalable to 28nm and below. The IP is offered at and has been adopted by all top-tier semiconductor foundries and selected IDMs. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, WHDI, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, please visit www.sidense.com.
Media Contacts: Susan Cain Cain Communications for Sidense Tel: 503-538-2747 Email: Email Contact Jim Lipman Sidense Tel : 925-606-1370 Email : Email Contact