Olympus-SoC and Calibre Speed IC Physical Design Closure
The Calibre InRoute platform allows designers to natively invoke Calibre tools within the Olympus-SoC place and route system to achieve true manufacturing closure during physical design. The Calibre InRoute product automatically detects and fixes design rule checking (DRC) violations and performs design for manufacturing (DFM) enhancements while optimizing for area, timing, power and signal integrity. The full power of the Olympus-SoC and Calibre platforms together improve design quality, eliminate late-stage surprises, and significantly reduce time to closure.
FloTHERM 9 Addresses Thermal Bottlenecks
Version nine of the FloTHERM 3D CFD (computational fluid dynamics) software for electronics cooling applications includes patent-pending technology, including a bottleneck field that shows areas in a design where a heat path is being congested as it attempts to flow from high junction temperature points to ambient. Design changes to these bottlenecks can help solve the heat flow problem. The Shortcut field highlights areas where the addition of a simple element to the design will provide a new effective heat flow path to ambient temperature. As a result, instead of experimenting with trial and error solutions, engineers can achieve a better solution significantly faster.
Mentor Adds SystemC Support to Catapult C
The Catapult C Synthesis tool added SystemC synthesis, expanding the Catapult C tool's full-chip synthesis capabilities. This complements the Catapult C tool's existing untimed ANSI C++ support for algorithmic, control logic, and low-power synthesis capabilities by expanding its full-chip synthesis application scope through the addition of SystemC synthesis for efficient handling of specific SoC needs such as complex bus interfaces, SoC interconnect and TLM2.0-based ESL flows.
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For more information, please contact: Gene Forte Mentor Graphics 503.685.1193 Email Contact Sonia Harrison Mentor Graphics 503.685.1165 Email Contact