Sidense Exhibiting at SMIC 2010 Symposium

OTTAWA and SANTA CLARA, CA -- (MARKET WIRE) -- Oct 01, 2010 --


What
Sidense exhibiting at SMIC 2010 Symposium
Booth #2

Where
Santa Clara Convention Center
5001 Great America Parkway
Santa Clara, California 95054

When
Oct. 8, 2010
12-5:30PM

Who
Jim Lipman, Sidense Marketing Director

About Sidense
Sidense Corp. provides secure, very dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes with no additional masks or process steps required and no impact on product yield. The Company's innovative one-transistor 1T-Fuse™ architecture provides the industry's smallest footprint, most reliable and lowest power Logic Non-Volatile Memory (NVM) IP solution. With over 70 patents granted or pending, Sidense OTP provides a field-programmable alternative solution to Flash, mask ROM and eFuse in many OTP and MTP applications.

Sidense OTP memory, embedded in over 100 customer designs, is available from 180nm down to 40nm and is scalable to 28nm and below. The IP is offered at and has been adopted by all top-tier semiconductor foundries and selected IDMs. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, WHDI, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, please visit www.sidense.com

About the SMIC Symposium
The symposium, with a theme of "Partnership for Success," is one of five scheduled worldwide in 2010. This year's event marks the ten-year-anniversary for SMIC.The event will showcase SMIC's most up-to-date manufacturing offerings and design technology in the IC industry and should attract several hundred customers, design service providers, technology partners and vendors from around the world.

 

Add to Digg Bookmark with del.icio.us Add to Newsvine

 

For more information or to schedule a meeting with Sidense please contact:

Jim Lipman
Sidense

Email Contact
925-606-1370 





Review Article Be the first to review this article
CST: Webinar

Aldec Simulator Evaluate Now

Featured Video
Jobs
ASIC Hardware Engineer for BAE Systems Intelligence & Security at Arlington, VA
ASIC Design Engineer for Infinera Corp at Sunnyvale, CA
Acoustic Systems Test Engineer for Cirrus Logic, Inc. at Austin, TX
Senior PIC Test Development Engineer for Infinera Corp at Sunnyvale, CA
Principal PIC Hardware Controls Engineer for Infinera Corp at Sunnyvale, CA
Design Verification Engineer for Cirrus Logic, Inc. at Austin, TX
Upcoming Events
IC Open Innovation Panel During REUSE 2017 at Santa Clara Convention Center 5001 Great America Parkway Santa Clara CA - Dec 14, 2017
Essentials of Electronic Technology: A Crash Course at Columbia MD - Jan 16 - 18, 2018
Essentials of Digital Technology at MD - Feb 13 - 14, 2018
CST: Webinar series



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise