SynaptiCAD's GOF fixes Logic Equivalence Check Failures

SynaptiCAD's Verilog netlist editor, Gates-on-the-Fly (GOF), has recently been updated to support easy correction of logic equivalence failures introduced during modifications to post-synthesis netlists, using equivalence check reports from either Cadence's Conformal LEC or Synopsys's Formality. SynaptiCAD has also published a white paper, Gates-on-the-Fly fixes Logic Equivalence Check Failures, that describes how the updated GOF was used to find and fix failures indentified by Cadence's Conformal tool at a customer site.

 

GOF fixes Logic Equivalence Check Failures

GOF Overview

GOF graphically analyzes and edits large Verilog netlists that have been generated from a synthesis or layout tool. Netlists sometimes require changes to either meet timing closure specifications, fix functional logic bugs, or to repartition a design. Using GOF's unique "incremental schematic" technology, you can easily find, view, and edit specific logic cones in your design on a schematic to visualize just the paths you need to see without unnecessary clutter.

For more information on Gates-on-the-Fly see the Gates-on-the-Fly Product Page.

Pricing and Availability

Gates-on-the-Fly is available on Windows and Linux. A perpetual license sells for $5000 on Windows. Leasing options are also available. For more information, contact SynaptiCAD at phone (800)804-7073 or (540)953-3390, fax (540)953-3078, email: sales@syncad.com, web www.syncad.com

Marketing Contact

For any questions concerning this press release please contact Donna Mitchell at 540-953-3390 or email at Email Contact. High-resolution images can be downloaded directly from SynaptiCAD's web site at www.syncad.com.




Review Article Be the first to review this article

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
H-1B Visa: de Geus’ tragedy looms large
Peggy AycinenaIP Showcase
by Peggy Aycinena
IP for Cars: Lawsuits are like Sandstorms
More Editorial  
Jobs
Technical Support Engineer for EDA Careers at Freemont, CA
Staff Software Engineer - (170059) for brocade at San Jose, CA
Mechanical Designer/Engineer for Palo Alto Networks at Santa Clara, CA
Lead Java Platform Engineer IOT-WEB for EDA Careers at San Francisco Area, CA
ASIC/FPGA Design Engineer for Palo Alto Networks at Santa Clara, CA
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
Upcoming Events
Embedded Systems Conference ESC Boston 2017 at Boston Convention & Exhibition Center Boston MA - May 3 - 4, 2017
2017 GPU Tech Conference at San Jose McEnery Convention Center 150 West San Carlos Street San Jose CA - May 8 - 11, 2017
High Speed Digital Design and PCB Layout at 13727 460 Ct SE North Bend WA - May 9 - 11, 2017
Nanotech 2017 Conference & Expo at Gaylord National Hotel & Convention Center WA - May 14 - 17, 2017
DAC2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy