In April of 2010, STATS ChipPAC established itself as the first in the world to implement 300mm eWLB wafer manufacturing capabilities. STATS ChipPAC's robust, automated eWLB manufacturing process which includes wafer reconstitution, wafer level molding, redistribution using thin film technology, solder ball mount, package singulation and testing has proved to be a solid foundation on which the company has rapidly ramped production volumes since fourth quarter of 2009. With over 35 million eWLB units shipped to date, STATS ChipPAC established itself as the worldwide leader in eWLB manufacturing volume and capacity with competitive yields.
The transition from 200mm to 300mm eWLB wafer manufacturing provides STATS ChipPAC and our customers with a number of cost and productivity benefits such as higher efficiency and economies of scale as compared to the existing 200mm eWLB reconstituted wafer format. STATS ChipPAC's initial investment in eWLB technology totals more than US$100 million. The transition to 300mm eWLB manufacturing combined with the Company's focus on increasing productivity per worker by more than two fold will reinforce STATS ChipPAC's leadership position in eWLB.
"We believe eWLB technology is quickly becoming the new advanced packaging solution that more customers are choosing to satisfy the relentless consumer market demand for complex and power efficient semiconductor devices in mobile phones and other handheld electronic products. Our goal is to deliver innovative, cost effective manufacturing technology to customers and help them rapidly ramp to volume production," said Tan Lay Koon, President and Chief Executive Officer, STATS ChipPAC. "STATS ChipPAC has differentiated itself by our commitment to eWLB technology, from our capital investment to raising the bar on manufacturing efficiency and productivity which directly benefits our customers."
STATS ChipPAC expects to continue to invest to further expand its eWLB capacity and capabilities over the next three years as the market demand continues to grow for small form factor, small footprint solutions with an increasing number of interconnects. Advanced fab technology nodes drive smaller silicon die sizes with finer interconnect pitches. The eWLB design advantage is that the package size is larger than the silicon die in order to provide sufficient area for the interconnection of the package to the application board. As a result, eWLB has the potential to realize a higher number of interconnects with standard pitches at multiple wafer technology nodes.
Certain statements in this release are forward-looking statements that involve a number of risks and uncertainties that could cause actual events or results to differ materially from those described in this release. Factors that could cause actual results to differ include, but are not limited to, general business and economic conditions and the state of the semiconductor industry; prevailing market conditions; demand for end-use applications products such as communications equipment, consumer and multi-applications and personal computers; decisions by customers to discontinue outsourcing of test and packaging services; level of competition; our reliance on a small group of principal customers; our continued success in technological innovations; pricing pressures, including declines in average selling prices; intellectual property rights disputes and litigation; our ability to control operating expenses; our substantial level of indebtedness and access to credit markets; potential impairment charges; availability of financing; changes in our product mix; our capacity utilization; delays in acquiring or installing new equipment; limitations imposed by our financing arrangements which may limit our ability to maintain and grow our business; returns from research and development investments; changes in customer order patterns; shortages in supply of key components; customer credit risks; disruption of our operations; loss of key management or other personnel; defects or malfunctions in our testing equipment or packages; rescheduling or canceling of customer orders; adverse tax and other financial consequences if the taxing authorities do not agree with our interpretation of the applicable tax laws; classification of our Company as a passive foreign investment company; our ability to develop and protect our intellectual property; changes in environmental laws and regulations; exchange rate fluctuations; regulatory approvals for further investments in our subsidiaries; majority ownership by Temasek Holdings (Private) Limited ("Temasek") that may result in conflicting interests with Temasek and our affiliates; unsuccessful acquisitions and investments in other companies and businesses; labor union problems in South Korea; uncertainties of conducting business in China and changes in laws, currency policy and political instability in other countries in Asia; natural calamities and disasters, including outbreaks of epidemics and communicable diseases; the continued trading and listing of our ordinary shares on the Singapore Exchange Securities Trading Limited ("SGX-ST"); and other risks described from time to time in the Company's filings with the U.S. Securities and Exchange Commission, including its annual report on Form 20-F dated March 5, 2010. You should not unduly rely on such statements. We do not intend, and do not assume any obligation, to update any forward-looking statements to reflect subsequent events or circumstances.
About STATS ChipPAC Ltd.
STATS ChipPAC Ltd. is a leading service provider of semiconductor packaging design, assembly, test and distribution solutions in diverse end market applications including communications, digital consumer and computing. With global headquarters in Singapore, STATS ChipPAC has design, research and development, manufacturing or customer support offices in 10 different countries. STATS ChipPAC is listed on the SGX-ST. Further information is available at www.statschippac.com. Information contained in this website does not constitute a part of this release.
Investor Relations Contact: Tham Kah Locke Vice President of Corporate Finance Tel: (65) 6824 7788 Fax: (65) 6720 7826 email: Email Contact Media Contact: Lisa Lavin Deputy Director of Corporate Communications Tel: (208) 867-9859 email: Email Contact