GRID Simulation Technology Joins Virage Logic VIP Partner Program

Promotes SimCHECK for Verification of Power Integrity Sign-off Flows for Advanced Process Memory IP

San Jose, CA, Tokyo, Japan, - August 10th, 2010

GRID Simulation Technology, Inc. (GST), GRID Simulation Technology, Inc.; a Silicon Valley-based Electronic Design Automation (EDA) company delivering SPICE accurate simulation and verification solutions to solve the world's most complex electronics problems, today announced it has joined Virage Logic Corporation’s VIP Partner Program to promote SPICE-accurate power integrity sign-off for semiconductor memory IP. GST provides giga-scale SPICE-accurate solutions for analysis of IC power grid problems including IR voltage drop and electro-migration (EM) and the qualification of complex power network analysis results. The Virage Logic VIP Partner Program brings together technology and business alliances with Design Services, EDA and Test, Foundry, and Intellectual Property (IP) partner companies to provide a broad range of complementary solutions for System-on-Chip (SoC) design.

SimCHECK™ Mitigates Sign-off Risks from Inconsistent EMIR Simulation Results

Current generation EMIR analysis tools suffer from limitations in speed, capacity, and accuracy when analyzing IP blocks and complex SoCs. To handle these ‘oversized’ problems, these EMIR simulators often employ hidden reduction methods to reduce the size of the networks being analyzed. While these methods are effective in reducing runtimes, they immediately cause accuracy loss in simulation and as well as the loss of traceability between simulation results and the original circuit under evaluation.  Unfortunately, there has been no “Golden Numeric” reference to identify and quantify where these tradeoffs are made. To ensure the manufacturability of designs, a consistent Quality of Result (QoR) from EMIR simulation is necessary to verify any trade-offs made; and to understand any introduced source(s) of error. With SimCHECK, circuit design, CAD, and verification teams now have a “no compromises” EMIR Verification capability to qualify the results of any simulation result independent of EDA tool, computational method, and technology modeling technique.

"The VIP Partner Program’s mission is to help increase interoperability and provide access to complete solutions that enable mutual customers to accelerate silicon success by reducing design time and improving manufacturability,” said Joel Rosenberg, Senior Marketing Director for Virage Logic.  “As the semiconductor industry's trusted IP partner, we look forward to working with GRID Simulation Technology to address customer power integrity sign-off for designs using our ASAP™, STAR™ and advanced SiWareTM Memory IP.”

"SimCHECK provides complete numeric verification of EMIR analysis results with 100% reporting and traceability of nodal values to verify quality QoR, total power consumption, and the manufacturability of IP blocks and SoC designs,” said John L. Kulusich, Vice President, Business Development, GST.  “Joining Virage Logic’s VIP Partner Program is the next step in GST’s plan in delivering solutions to answer customer needs for power integrity verification and sign-off and improved manufacturability analysis. We look forward to accelerated customer and silicon success working as part of Virage Logic’s VIP Partner Program.”  

About GRID Simulation Technology

GRID Simulation Technology, Inc. is a Silicon Valley based Electronic Design Automation (EDA) company dedicated to solving the world's largest and most complex electronics problems at true SPICE-accuracy through its revolutionary new analysis technology.  The company's flagship products, NanoRAIL™ and SimCHECK™, provide analysis of IC power grid problems including IR voltage drop and electro-migration (EM), and the qualification of complex power network analysis results.  The company is a privately held California Corporation headquartered in Morgan Hill, CA with offices located in: Irvine, CA; East Fishkill, NY; and Tokyo, Japan.

For More Information Contact:

John L. Kulusich, jlk@gridsimtech.com
GRID Simulation Technology, Inc.
1295 East Dunne Avenue, Suite 215 Morgan Hill, CA 95037
http://www.gridsimtech.com


NanoRAIL™, and SimCHECK™ are trademarks of GRID Simulation Technology, Inc.         ASAP™, STAR™, and SiWareTM Memory are trademarks of Virage Logic Corporation.




Review Article Be the first to review this article
CST: Webinar

Aldec Simulator Evaluate Now

Featured Video
Jobs
Applications Engineer for intersil at Palm Bay, FL
RF IC Design Engineering Manager for Intel at Santa Clara, CA
Design Verification Engineer for Cirrus Logic, Inc. at Austin, TX
Senior Formal FAE Location OPEN for EDA Careers at San Jose or Anywhere, CA
Principal PIC Hardware Controls Engineer for Infinera Corp at Sunnyvale, CA
Upcoming Events
Essentials of Electronic Technology: A Crash Course at Columbia MD - Jan 16 - 18, 2018
Essentials of Digital Technology at MD - Feb 13 - 14, 2018
IPC APEX EXPO 2018 at San Diego Convention Center San Diego CA - Feb 24 - 1, 2018
CST: Webinar series
DownStream: Solutions for Post Processing PCB Designs
TrueCircuits: UltraPLL



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise