AWR’S IMS 2010 MicroApps Now Playing on IEEE TV
| | Rate | Review | Notices

Story:  AWR and its partners presented 13 MicroApps (shown below) during the 2010 International Microwave Symposium (IMS) held May 24-27 in Anaheim, CA.  Presentation topics ranged from LNA design with Analog Office® to filter synthesis with iFilter™ and PA design with Microwave Office®.  View the majority of these talks now on IEEE TV.

AWR AND PARTNER IMS 2010 MICROAPPS PRESENTATIONS
  • Multi-chip Module Design Challenges
  • Nonlinear Co-simulation with Real-time Channel Measurements for PCB Signal Integrity
  • Causality Considerations for Multi-Gigabit StatEye Analysis
  • System-Level Component Models for RF EDA
  • Multi-Rate Harmonic Balance for Non-Linear Simulation
  • PA Design Inclusive of Load-Pull Analysis
  • Online Design Environment Provides Interactive Datasheets for Small Signal RF Transistors – Allows Users to Generate Custom Datasheets for a Variety of Operating Conditions
  • Using AWR’s iFilter™ Wizard to Efficiently Synthesize Lumped & Distributed Filters
  • Single Chip LNA Using High Q Inductors on a Silicon-on-Sapphire Process
  • A New Approach for Nonlinear Behavioral Modeling
  • A Methodical Approach to Analyzing and Understanding the Performance of a LTE System
  • The Use of Computer Clusters and Spectral and Domain Decomposition in 3D FEM Analysis
  • Test & Measurement Migration to Integrated Simulation, Test & Measurement for M&RF Design

MicroApps are concise technical presentations given by exhibitors on engineering topics of interest to the microwave community while at IMS. They cover new products, noteworthy state-of-the-art components, emerging technologies, and novel manufacturing and design techniques that incorporate the exhibitor’s products and technologies in an application-centric setting.




Review Article Be the first to review this article
CST: Webinar

Aldec Simulator Evaluate Now

Featured Video
Jobs
DSP Tools Engineer for Cirrus Logic, Inc. at Austin, TX
Acoustic Systems Test Engineer for Cirrus Logic, Inc. at Austin, TX
Senior Formal FAE Location OPEN for EDA Careers at San Jose or Anywhere, CA
Principal PIC Hardware Controls Engineer for Infinera Corp at Sunnyvale, CA
Senior PIC Test Development Engineer for Infinera Corp at Sunnyvale, CA
Design Verification Engineer for Cirrus Logic, Inc. at Austin, TX
Upcoming Events
Essentials of Electronic Technology: A Crash Course at Columbia MD - Jan 16 - 18, 2018
Essentials of Digital Technology at MD - Feb 13 - 14, 2018
IPC APEX EXPO 2018 at San Diego Convention Center San Diego CA - Feb 24 - 1, 2018
CST: Webinar series



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise