The "High-level Synthesis Blue Book" explains the fundamentals of high-level synthesis and the essential principles of C-based hardware design, progressing from simple concepts such as sequential logic design, to more complicated topics such as memory architecture and hierarchical sub-system design. All the concepts presented in the book have practical application for developing hardware, and are illustrative independent of whether a designer is working in pure ANSI C++ or in SystemC.
The concepts are thoroughly illustrated with numerous code examples and rich supporting graphics of hardware and timing diagrams. Starting from simple practical cases, the examples ultimately translate to much larger, more complex designs typical of today's multi-core SoC designs. Upon completion of reading the "High-level Synthesis Blue Book," a designer should be well on the way to becoming an expert in using high-level synthesis.
"After talking with hundreds of customers using HLS tools, and many RTL designers wanting to move to HLS, we decided there were obvious things we could do to help accelerate the adoption and use of high-level synthesis technology," said Simon Bloch, vice president and general manager, Design and Synthesis division at Mentor. "The 'High-level Synthesis Blue Book' provides a firm foundation for writing high-quality synthesizable C++ code including recommendations for achieving superior quality of results in hardware and good programming practices to ensure 'clean' code that passes compilation, execution, and RTL/C++ co-verification."
The release of the "High-level Synthesis Blue Book" is just one of the many activities engaged in by Mentor to help hardware designers adopt HLS technology. Other programs include an active HLS silicon vendor program, as demonstrated by the Catapult® C tool support for TSMC RF 11, the certification of multiple EDA vendor ESL flows, consulting services, extensive training, involvement in standards and a robust university program.
Interested in what's new in the Catapult C tool, including support for SystemC? Visit the Mentor booth #1383 at the Design Automation Conference (DAC), June 14 - 16, 2010, and register to attend the suite session titled: Catapult C Synthesis: A Game Changer for Full-Chip, High-Level Synthesis. For online registration prior to the conference visit: http://www.mentor.com/events/design-automation-conference/.
For a copy of the "High-level Synthesis Blue Book," visit: http://www.hlsbluebook.com/.
About Catapult C Synthesis
The Catapult C Synthesis tool automatically generates control and algorithmic RTL multi-block designs from pure ANSI C++ and SystemC sources. This process empowers designers to quickly achieve fully optimized and error-free hardware implementation. By accelerating time to verified RTL without sacrificing quality of results, the Catapult C tool provides the productivity boost required to tackle the design and verification challenges of modern ASIC design. The Catapult C tool has been recognized as the HLS market leader by Gary Smith EDA for three years in a row.
About Mentor Graphics
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For more information, please contact: Carole Dunn Mentor Graphics 503.685.4716 Email Contact Ryerson Schwark Mentor Graphics 503.685.1660 Email Contact