Will Showcase Cynthesizer Silicon-Proven SystemC High-Level Synthesis, CellMath Designer Advanced Datapath Synthesis and Unique Arithmetic IP
SAN JOSE, Calif. — (BUSINESS WIRE) — January 22, 2010 — Forte Design Systems will demonstrate its SystemC high-level synthesis software for hardware and electronic system level (ESL) design, register transfer level (RTL) datapath synthesis software and its arithmetic intellectual property (IP) in Booth #205 at the Electronic Design and Solution Fair (EDSFair 2010). EDSFair 2010 will be held January 28-29 at the Pacifico Yokohama in Kanagawa, Japan.
Continuous demonstrations of Cynthesizer™, high-level synthesis silicon proven by the top systems and semiconductor companies in Japan, will highlight its features, including its support for complex control and datapath designs with fully accurate modeling capabilities with SystemC. Forte will also debut the first release of CellMath™ Designer (CMD) datapath synthesis under the Forte brand. CellMath Designer uses advanced algorithms and patented arithmetic IP, including fixed and floating point functional units, to improve the quality of results on existing RTL designs by reducing area and power usage.
Details on Forte, Cynthesizer and CellMath can be found at: www.ForteDS.com.
For more information about EDSFair 2010, go to: www.edsfair.com/e/.
About Forte Design Systems
Forte Design Systems is a leading provider of software products that enable design at a higher level of abstraction and improve design results. Its innovative synthesis technologies and intellectual property offerings allow design teams creating complex electronic chips and systems to reduce their overall design and verification time. More than half of the top 20 worldwide semiconductor companies use Forte’s products in production today for ASIC, SoC and FPGA design. Forte is headquartered in San Jose, Calif., with additional offices in England, Japan, Korea and the United States. For more information, visit www.ForteDS.com.
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