Tanner EDA Exhibit at Microsystems Symposium Showcases Software for Design, Layout and Verification of Analog and Mixed-Signal ICs and MEMS Applications

Who:

Tanner EDA, the world leader in PC-based analog, mixed-signal (A/MS) and MEMS circuit design software, is exhibiting at the CMC Microsystems 2009 Annual Symposium. The event brings together academic, industry, and government leaders from science and engineering communities.

 

When/Where:

8:30am-5:00pm, Wednesday, October 14, 2009:

International Ballroom, Crowne Plaza Hotel

Ottawa, ON, Canada

 

More Information:

For more information about Tanner EDA, please visit www.tannereda.com

For more information about the CMC Symposium, please visit http://www3.cmc.ca.

 

About Tanner EDA Software

HiPer Silicon™ is Tanner EDA’s hallmark software suite for the design, layout and verification of A/MS, RF and MEMS ICs. It includes core functionality for schematic capture, analog circuit simulation and physical layout as well as advanced features that improve designer productivity; including the HiPer Verify™ foundry-compatible physical verification engine, Verilog-A simulation, an interactive autorouter and device layout automation. The entire Tanner EDA product line is available on Windows and Linux platforms.

 

About Tanner EDA

Tanner EDA is a leading provider of PC-based electronic design automation (EDA) software solutions for the design, layout and verification of analog and mixed-signal ICs and MEMS. Its solutions promote innovation by speeding designs from concept to silicon. Tanner EDA software is used by thousands of companies in markets ranging from consumer electronics, biomedical, wireless, imaging, power management, RF and photovoltaics. Founded in 1988, Tanner EDA has shipped over 25,000 licenses of its PC-based electronic design software to more than 4,000 customers in 67 countries. For more information on Tanner EDA products, visit www.tannereda.com.

-end-

Press Contact:

Georgia Marszalek, ValleyPR for Tanner EDA, +1 650 345 7477, Email Contact Twitter: @ValleyPR




Review Article Be the first to review this article
CST: Webinar September 14, 2017

Aldec

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Real Intent: Leveraging on Investments
More Editorial  
Jobs
Analog Hardware Engineer for Teradyne Inc at San Jose, CA
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
FPGA Engineer for Teradyne Inc at San Jose, CA
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
Field Application Engineer for Teradyne Inc at San Jose, CA
Upcoming Events
IEEE Electronic Design Processing Symposium 2017 at 673 S. Milpita Blvd Milpitas CA - Sep 21 - 22, 2017
CODES+ISSS 2017, Oct 15-20, 2017, Lotte Hotel, Seoul, South Korea at Lotte Hotel Seoul Korea (North) - Oct 15 - 20, 2017
DVCon 2017 Europe, Oct 16 - 17, 2017, Munich, Germany at Holiday Inn Munich City Centre Munich Germany - Oct 16 - 17, 2017
TrueCircuits: UltraPLL



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise