Custom design requires both flexibility and consistency in the design flow to address the broad array of challenges engineers address on a daily basis. The key challenge is being able to effectively and efficiently explore and validate a design as early as possible in the flow. The Cadence Virtuoso custom design platform improves efficiency by streamlining the common tasks involved in custom design, enabling IC designers to concentrate on the unique challenges of creation and implementation.
The Virtuoso techtorial will follow a keynote by Robert Milkovits, Director, Design Support at Jazz Semiconductor and is intended for analog/mixed-signal design managers and supporting CAD managers. The keynote will include a technical overview of how Virtuoso tools meet modern design challenges and tighter deadlines. A lab/workshop will be offered by Cadence, geared toward existing users of Virtuoso tools on the IC 5.1.41 release in both electrical and physical design. Attendees will also have the opportunity to test-drive the latest in the industry’s leading solution for custom IC design.
“We continue to provide new solutions to speed time to market for AIMS products through design enablement technology such as the Virtuoso IC 6.1 platform for our 0.18um SiGe BiCMOS process,” said Dr. Marco Racanelli, Senior VP and General Manager, RF and High Performance Analog Business Group, Jazz Semiconductor. “The partnerships we forge with leading EDA vendors such as Cadence, coupled with our silicon-accurate models and proprietary design tools, provide our customers a complete design environment with a track record of first-pass success for high-performance analog and RF products.”
“Through Jazz’s early adoption of the Virtuoso IC 6.1 platform, we have been able to provide our mutual customers with high-quality PDKs to achieve more predictable designs and decrease cycle times for their highly differentiated RF and analog-intensive mixed-signal AIMS IC designs,” said Tom Beckley, corporate vice president at Cadence. “We look forward to sharing the advantages of the Virtuoso platform with many more mixed-signal designers and CAD managers at the upcoming techtorial hosted by Jazz.”
About Tower Semiconductor, Ltd. and Jazz Semiconductor, Inc.
Tower Semiconductor Ltd. (NASDAQ: TSEM) (TASE: TSEM) is a pure-play independent specialty wafer foundry and its fully owned U.S. subsidiary Jazz Semiconductor, Inc., is a leader in Analog-Intensive Mixed-Signal (AIMS) foundry solutions. Tower and Jazz manufacture integrated circuits with geometries ranging from 1.0 to 0.13-micron and provide complementary technical services and design support. In addition to digital CMOS process technology, Tower offers advanced mixed-signal and RF CMOS, Power Management, CMOS image-sensor, non-volatile memory technologies and Flash MTP and OTP solutions. Jazz's comprehensive process portfolio of modular AIMS technologies includes RFCMOS, Analog CMOS, Silicon and SiGe BiCMOS, SiGe C-BiCMOS, Power CMOS and High Voltage CMOS. To provide world-class customer service, Tower maintains two manufacturing facilities in Israel; Jazz maintains a fab in the U.S. and additional manufacturing capacity is available in China through partnerships with ASMC and HHNEC. For more information, please visit www.towersemi.com and www.jazzsemi.com.
Safe Harbor Regarding Forward-Looking Statements
This press release includes forward-looking statements, which are subject to risks and uncertainties. Actual results may vary from those projected or implied by such forward-looking statements. A complete discussion of risks and uncertainties that may affect the accuracy of forward-looking statements included in this press release or which may otherwise affect Tower’s and Jazz’s business is included under the heading "Risk Factors" in Tower’s most recent filings on Forms 20-F, F-3, F-4 and 6-K, as were filed with the Securities and Exchange Commission (the “SEC”) and the Israel Securities Authority and Jazz’s most recent filings on Forms 10-K and 10-Q, as were filed with the SEC. Tower and Jazz do not intend to update, and expressly disclaim any obligation to update, the information contained in this release.
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