Micram Announces Broad Range of Silicon for 100G Development

SAN DIEGO—(BUSINESS WIRE)—March 24, 2009— Building on its leadership in ultrafast 100G silicon, Micram has announced an impressive slate of new components at this week’s Optical Fiber Conference in San Diego, including the first silicon supporting the On-Off Keying (OOK) modulation scheme.

“Our goal in 100G is to give optical communications visionaries the tools they need to bring their ideas to life as quickly as possible,” said Matthias Tom Frei, CEO of Micram. “Our latest range of components greatly expands what aggressive developers can achieve over the next 12 to 18 months. In particular, we are announcing the first silicon supporting OOK, an important electrical modulation scheme that Micram is taking from the theoretical to the practical with our new 112G Mux/Demux chips.”

12 New 100G Development Chips

In its new range of silicon, Micram provides several varied multiplexer, demultiplexer and MSDFF components supporting the 30 Gb/s and 60 Gb/s speed ranges. The MX4130F 4:1 Mux breaks new ground by providing a FPGA control layer, enabling very high speed data streams to be generated by off-the-shelf FPGAs from Xilinx and Altera.

Also new from Micram are a series of single and quad transimpedance amplifiers (TIA) supporting both 3.3V and 5.2V applications, as well as a clock distribution module and frequency divider chip.

Mux/Demux

-- CDR14112

  112 Gb/s CDR with 1:4 Demux with integrated VCO & PLL

-- MX41112

112 Gb/s 4:1 Mux

-- DMX1460

60 Gb/s 1:4 Demux

-- MX4130F

30 Gb/s 4:1 Mux with FPGA interface (Xilinx Virtex 4/5 & Altera Stratix-IV)
 

MSD Flipflops

-- DFF30

30 GHz Master-Slave D-Flipflop

-- DFF60

60 GHz Master-Slave D-Flipflop
 

Transimpedance Amplifiers

-- TIA5633

56 Gb/s TIA (3.3V)

-- TIA5652

56 Gb/s TIA (5.2V)

-- TIA4C-5633

56 Gb/s Quad TIA (3.3V)

-- TIA4C-5652

56 Gb/s Quad TIA (5.2V)
 

Clock Distribution Module

-- CD15

15 GHz versatile clock distribution module (enables syncing of several DACs or ADCs and provides clocks for FPGAs)
 

Frequency Divider

-- FD60

60 GHz frequency divider with selectable ratio (2 to 256)

1 | 2  Next Page »



Review Article Be the first to review this article

Aldec Simulator Evaluate Now

Featured Video
Jobs
Design Verification Engineer for Cirrus Logic, Inc. at Austin, TX
Design Verification Engineer for intersil at Morrisville, NC
Senior PIC Test Development Engineer for Infinera Corp at Sunnyvale, CA
Senior Formal FAE Location OPEN for EDA Careers at San Jose or Anywhere, CA
RF IC Design Engineering Manager for Intel at Santa Clara, CA
Senior DSP Firmware Engineer for Cirrus Logic, Inc. at Austin, TX
Upcoming Events
IC Open Innovation Panel During REUSE 2017 at Santa Clara Convention Center 5001 Great America Parkway Santa Clara CA - Dec 14, 2017
Essentials of Electronic Technology: A Crash Course at Columbia MD - Jan 16 - 18, 2018
Essentials of Digital Technology at MD - Feb 13 - 14, 2018
CST: Webinar series



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise