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ClariPhy Launches 10 Gb/s CDR with MLSE at OFC/NFOEC 2009
IRVINE, Calif.—(BUSINESS WIRE)—March 17, 2009— ClariPhy Communications, Inc., a fabless semiconductor company specializing in high speed communications ICs, today announced the launch of its CL1012 10 gigabit per second (Gb/s) clock and data recovery (CDR) integrated circuit (IC) with maximum likelihood sequence estimation (MLSE). The all-digital single-chip CMOS IC sets a new benchmark in power and performance for the electronic dispersion compensation (EDC) of impairments inherent to optical fiber in telecommunications (telecom) networks. MLSE (also referred to as maximum likelihood sequence detection or MLSD) is known to be the theoretically optimal EDC architecture, which evaluates a sequence of received data samples to determine the most likely correct transmitted sequence. MLSE is used ubiquitously in lower speed communications applications such as hard disk drives and voice band modems, but only ClariPhy has delivered MLSE at 10 Gb/s data rates in CMOS, thereby achieving maximum performance while leveraging CMOS cost and power trends following Moore's Law. According to Daryl Inniss, vice president and practice leader at Ovum, “Accelerating growth in bandwidth demand is forcing carriers to squeeze more capacity from their installed fiber while tightly controlling cost. MLSE is emerging as a valuable EDC technology for telecom networks as a result of its potential for low power consumption and low cost.” ClariPhy’s CL1012 CDR with MLSE is superior by design to EDC ICs based on the suboptimal decision feedback equalizer (DFE) architecture, providing significantly greater tolerance to chromatic dispersion (CD), polarization mode dispersion (PMD) and nonlinear distortion, impairments that are prevalent in telecom networks. Furthermore, at less than two watts, the power dissipation of the single-chip CMOS CL1012 is dramatically lower than alternative multi-chip implementations of MLSE utilizing silicon germanium process technology. “As a leading vendor of optical modules for telecom networks, we are excited to see ClariPhy launch the CL1012 CDR with MLSE,” said Chris Clarke, vice president of strategy and chief engineer at Bookham. “We believe that MLSE offers significant value to telecom carriers, and that the CL1012 hits the power, performance and cost targets necessary for its adoption.” The CL1012 CDR with MLSE is manufactured in a 65 nm CMOS process and assembled in a 10×10 mm2 flip chip BGA package. Operating at data rates from 9.9 to 11.4 Gb/s, it tolerates ±4,000 ps/nm of CD and 100 ps of differential group delay (DGD), the key component of PMD. Typical application environments for the CL1012 include 300 pin MSA transponders and XFP transceivers. Carriers deploying the CL1012 in their optical modules will realize both opex and capex savings by reducing or eliminating expensive and bulky optical dispersion compensation equipment, avoiding the need for fiber characterization, and enabling the use of a greater percentage of their installed fiber. “The CL1012 is the first and only 10 Gb/s MLSE solution available in single-chip CMOS,” said Dr. Paul Voois, cofounder and CEO of ClariPhy. “MLSE’s ability to compensate fiber impairments offers proven benefits to telecom carriers, enabling them to reduce their costs and improve the efficiency of their optical networks. Leveraging our mixed-signal design capabilities and the advantages of 65nm CMOS, ClariPhy has made MLSE available at a low cost and power that will enable widespread deployment.” ClariPhy will demonstrate its MLSE ICs in a private suite at the OFC/NFOEC conference ( www.ofcnfoec.org) in San Diego, California on March 22-26, 2009. To schedule a meeting with ClariPhy during OFC, please contact Oswin Schreiber at 858-531-7012 or Email Contact. About ClariPhy ClariPhy Communications, Inc. develops mixed-signal CMOS integrated circuits (ICs) that enable ubiquitous adoption of advanced signal processing technology in 10, 40 and 100 Gb/s optical networks, thereby eliminating the cost and legacy infrastructure barriers to widespread deployment. ClariPhy is headquartered in Irvine, CA, and has an office in Silicon Valley and a design center in Cordoba, Argentina. ClariPhy’s investors include Norwest Venture Partners, Onset Ventures, Allegis Capital and Pacific General Ventures. For more information, please visit www.clariphy.com. Contact:
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