Accellera Invites Electronic Design Community to Attend Free and Open Tutorial on the Design and Verification of Low Power SoCs at ISQED

SAN JOSE, CA -- (MARKET WIRE) -- Mar 09, 2009 --


Who/What

Accellera, the electronics industry organization focused on Electronic Design Automation (EDA) standards, announces its tutorial session on the Design and Verification of Low Power Systems-on-Chip (SoCs) at the 10th annual International Society of Quality Electronic Design ( ISQED) event. The Power session is organized by Accellera officer, Yatin Trivedi of Synopsys. The session's speakers include Yatin Trivedi, John Biggs of ARM and Gary Delp of LSI Logic.

When and Where

ISQED 2009,
Wednesday, March 18, 2009
1:30pm - 3:30pm
Doubletree Hotel, San Jose

Tutorial Abstract

Power management is critical in IC design, especially for mobile devices, battery-operated systems, and non-portable systems with power consumption constraints. However, not all applications have the same requirements for addressing power management.

In this tutorial, experts from different application areas will present the requirements and solutions for power management, including design, verification and analysis. The areas chosen for this tutorial include storage, automotive, Intellectual Property (IP) and EDA flows. A general overview of low power design and verification challenges for SoC designers will set the context for each of the application areas.

Registration Information

The Accellera session is free and open to all ISQED attendees with a Conference or free Exhibits pass. For more details about the tutorial, a complete list of ISQED'09 programs and to register please visit http://www.isqed.org.

For more information about Accellera and Accellera standards, please visit www.accellera.org.

About Accellera

Accellera provides design and verification standards for quick availability and use in the electronics industry. The organization and its members cooperatively deliver much-needed EDA standards that lower the cost of designing commercial IC and EDA products. As a result of Accellera's partnership with the IEEE, Accellera standards are provided to the IEEE standards body for formalization and ongoing change control.

For more information about Accellera, please visit www.accellera.org.

All trademarks and tradenames are the property of their respective owners.

Add to Digg Bookmark with del.icio.us Add to Newsvine

Press Contact:
Georgia Marszalek
ValleyPR for Accellera
+ (650) 345-7477

Email Contact





Review Article Be the first to review this article
Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Computer History Museum: the Future of War is Here
More Editorial  
Jobs
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, Germany
Senior SW Developer for EDA Careers at San Jose, CA
REVISED***Director Product Line RF/IC for EDA Careers at San Jose, CA
Upcoming Events
“Empowering Leadership with WIT and WISDOM” at SEMI 673 South Milpitas Blvd. Milpitas CA - Nov 28, 2017
Artificial Intelligence and Convolution Neural Networks Discussion at San Jose State University Student Union Theater San Jose CA - Dec 4, 2017
Silicon Valley's Only Comprehensive Embedded Systems Conference at San Jose Convention Center 150 W. San Carlos St. San Jose CA - Dec 5 - 7, 2017
Oski Technology’s Decoding Formal Club Meeting at The Conference Center San Jose CA - Dec 7, 2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise