The Future of EDA and the Semiconductor Industry, One Man’s View


Then you had the opposite experience, going from a $1 billion company to a startup. Did you go directly to eSilicon or was there a hiatus in between?
When I left Cadence, I had never before planned a career move. I got recruited here or acquired there or something like that. For the first time in my adult life, I stopped and said “What do I want?” I took about 9 months during the ’99 dot.com frenzy. I ran around looking at different businesses in the dot.com area and frankly concluded on a contrarian basis that companies without revenue would not survive, no matter how sexy there were. I sort of lost interest in a lot of those Internet 1.0 concepts. I started up eSilicon as the confluence of what my experience was, of what industry experience and knowledge I had and also what I thought was going to be the fundamental trends in the semiconductor business going forward. We started the business at the time with a sort of Internet veneer but we rapidly jettisoned that to make it more of an Internet core for the operational functions where it belongs and went back to basics around that we were going to sell chips and make money. The company just took its life from there. It was the right trend at the right time, even though like everyone else we have been dealt the setback of the dot.bom and now our current recession. We have been able to navigate around the traditional semiconductor industry and have a very viable business that has got great prospects.

Would you tell us some more about eSilicon?
As we discussed we started the business in March 200. It has been the fastest 9 years of my life. I’ve very mixed emotions to say. The company is a dedicated fabless company. We do not do this to fill empty capacity in another country. We do this because we want to make custom chips for the benefit of OEMs and the fabless semiconductor industry. About half of our companies are name brand public firms, one half are private firms. In another dimension about one-half of our companies are system houses and one-half are semiconductor industry firms. If you think abut X and Y axes, we have a very broad portfolio of market segments from a wide variety of companies from a dozen countries and multiple continents. We sort of think of our company in financial terms as a mutual fund of semiconductor opportunities as opposed to the traditional single share of stock. Inherent in that portfolio is a balance and a risk mitigation factor that allows us to weather the uncertainties of markets as they ebb and flow whether seasonally or secularly as things go in and out of favor. For example, we don’t have a large concentration in consumer products because it is just too damn risky. That strategy is paying dividends right now while the consumer markets have just basically gone to zero. That’s sort of the backdrop. We are spread around the world. We have an office in Sunnyvale. We have designers and technologists on the east coast in Allentown, Pennsylvania which is in the shadow of the old Bell Labs facility and also inn Murray Hill. There are 30 people in Bucharest Romania, digital designers as well as packaging designers and other infrastructure jobs. We have a package and assembly office in Shanghai and a sales office in Japan. As a small company we are globally positioned. The theory behind that is not so much to chase low cost centers. That is really not our goal, because the class of chip we work on requires local support. We are making 65 nm chips right now with over one billion transistors in them and our customers want to know that our engineers relevant to their product are generally in the same time zone. So we have positioned our teams accordingly.

Were these locations the result of acquisition or did you simply decide to go to Romania?
With the exception of Romania, everything opened by us was strategic. In Romania we bought a small business there 4 or 5 years ago with maybe a half-dozen people. We built that up to abut 30 folks now. It has been very successful. The 30 folks are highly educated. Their English skills are excellent. They are in complementary time zones to our customer base. The retention is virtually 100% as compared to India where there is 30% turnover very year. Any you can drink the water in Romania.

Just in terms of the volume, we make relatively large chips. We are shipping just under 10 million units per year. So there is a fairly large volume of parts running through the company. That of course, endears us to the supply chain. It is worth pausing for a second on the relationship with the supply chain. We have to talk about what we do for our customer some more. But for our suppliers, the relationship is very interesting. We are in effect a channel for them. Our wafer suppliers like to make wafers. That’s what TSMC likes to do. Our package and test guys like to make packages. What they do not like to do, if you talk to them privately, is call upon every little company and every little project in big companies around the world seeing if there is an opportunity for them. They have their hands full with the huge corporations that are shifting from the IDM model to the fabless model. It is all they can do to keep up with the demand of the likes of Philips and STmicro. What we provide them is the triage of the market to find the next iPod chip or the next red hot application that might run huge volumes. In the meantime, to the extent that we are making chips that have lower volumes than they would be interested in individually, we are bundling them up in a way that they just have to deal with one company, namely us, to get all the information they need to build these chips. There is inherent efficiency there that translates into lower costs for us to pass on to our customers or share in to generate our own margin. That is a very important aspect of our business model that we create our own margin by working with the supply chain. We aggregate a lot of demand, so we buy less than 90% of customers can individually number one and number 2 the inherent efficiency of giving them access to the market without them expending sales and marketing dollars gives our supply chain the added incentive to give us lower costs. So we create margin from these business conditions. Technically speaking, we also create margin, since we make a couple of dozen chips per year, we are constantly improving the methodology to have smaller dies and higher yields. Both of those variables are integral to the calculus around the economics of semiconductor. We just believe in general that we (and our customers believe it too) can make a smaller chip and a higher yielding chip than they can thereby once again creating margin that we can share. The business model early on had been accused of being a margin stacking function. In fact, we are a cost reducing function and have a standing offer to any chip company in the world that we will deliver them their chips at their costs today and we will do all the work and still make money. In other words, they can let go of all their infrastructure, all the fixed costs they have and we will deliver their chips to them at their costs and make money. That has been the business model that has evolved over the last 9 years.

We launch about one new design or product into the market per month with our customer’s logo on it. It is a good flow of business. Five years ago that would not have sounded like so much. I was just talking to Handle Jones of IBS, the consulting firm. From memory he told me that in the year 2010 only 8 companies in the world will tapeout 8 or more 65nm parts. We will be one of them. The people we are in company with are the names like Qualcomm, Broadcom, Samsung, and TI. The people you would expect. That shows you a couple of things. The number of design starts is shrinking due to the integration of multiple chips, a more cost effective and a more powerful solution. Number two, the logical extension of this obvious trend is that your average chip company will not be making very many chips in the future. Therefore, they won’t be very good at it. An integral part of our value and our future success is linked to the fact that your average opps teams will be making one chip every 18 months at 65nm. That simply does not justify keeping them on the payroll. Just like EDA went from 100 companies writing their own EDA tools in 1982 and 1983, that reduced down to 3 or 4 companies by 1986. The same thing is going to happen here. Unless you’re IBM, you can not justify an internal opps team, no more than you can justify your own mergers and acquisition team on the payroll. It simply does not make sense. The economies don’t support it but more important, if you are making one chip every 12 to 18 months, you can not be good at it. We are confidently predicting the jettison of the last major chunk of the semiconductor industry which is the physical design, operations function into multi billion dollar industry, just as EDA, wafer, package, test and IP have become multi-billion sub-industries. Operations which is about a billion dollar industry today will become a $10 billion industry in 3 to 5 years.

« Previous Page 1 | 2 | 3 | 4 | 5 | 6 | 7  Next Page »

Reviews:
Review Article
  • Great interview. Very insightful.... March 05, 2009
    Reviewed by 'EDA Observer'
    Thank you Mr Horgan for this insightful interview. I remember when Cadence acquired CCT.
    Paying $1 billion for a comapany with just $15 million in revenues shows how Cadence-Synopsys rivalry and their legal battles in the context of an "irrationally exuberant" stock (and M&A) market fueled decisions by Cadence exectives that explain partially why Cadence is where it is today.


      One person found this review helpful.

      Was this review helpful to you?   (Report this review as inappropriate)


  • Full circle or Half circle?? March 04, 2009
    Reviewed by 'Anil Nadig'
    We started the semiconductor industry with one company coming up with the architecture, write the RTL, do the layout with thier in-house tools and fabricate in their own fab (AKA IDMs). Then we shed the fabrication saying its too costly to maintain and invest in RnD (The Foundary company?), and then the in-house tools sayings its cumbersome to develop (EDA vendors?) and spawned off the layout-ing to a third party saying too much overhead because of fixed costs (Esilicon?). But the future seems to be "specalized" "Value chain producers" with access to foundry to be able to have insight into nanometer issues (DFM?) and in-house developed tools with the knowledge gained from foundry to have edge over competitors. Which means the future seems to be putting back atleast half (in-house foundry and in-house tools) of the things, that we shed for various reasons into, one company. Half circle?? May be a day will come when you may want to integrate these "specialized" "value chain producers" back to the architucture and RTL team for some reason thats not yet foreseen. That would be the full circle!!!. At least the near to middle term seems to be the half circle for sure.

      One person of 2 found this review helpful.

      Was this review helpful to you?   (Report this review as inappropriate)


  • The Future of EDA March 03, 2009
    Reviewed by 'Jeff Liu'
    The Future of EDA and the Semiconductor Industry, One Man’s View


      One person of 3 found this review helpful.

      Was this review helpful to you?   (Report this review as inappropriate)


For more discussions, follow this link …

Aldec

Featured Video
Jobs
Senior FPGA Engineer for MaXentric Technologies LLC at Fort Lee, New Jersey
Upcoming Events
SCOPES 2019 at Sankt Goar Germany - May 27 - 29, 2019
56th Design Automation Conference at Las Vegas Convention Center Las Vegas NV - Jun 2 - 6, 2019
Robotics Summit & Expo 2019 at Seaport Hotel & World Trade Center Boston MA - Jun 4 - 6, 2019
Machine Learning & AI Developers Conference at Santa Clara Convention Center – Mission City Ballroom 5001 Great America Pkwy Santa Clara CA - Jun 5 - 6, 2019
DownStream: Solutions for Post Processing PCB Designs
TrueCircuits: IoTPLL



Internet Business Systems © 2019 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise