Atrenta's SpyGlass-CDC Solution Boosts IP Integration Efficiency for Atheros

SAN JOSE, Calif.—(BUSINESS WIRE)—February 9, 2009— Atrenta Inc., the leading provider of Early Design Closure® solutions to radically improve design efficiency throughout the IC design flow, today announced that Atheros Communications, a global leader in innovative technologies for wireless and wired communications, has adopted its SpyGlass®- CDC product. Atheros will broadly deploy the tool to help reduce design risks associated with semiconductor IP integration.

Early Design Closure solutions from Atrenta allow design capture, verification, optimization and exploration early in the design flow at the register transfer language (RTL) stage, when it’s faster and easier to correct problems and explore alternatives. This approach facilitates propagation of design efficiencies to detailed, back-end implementation with minimized schedule risk.

Atrenta’s SpyGlass-CDC product analyzes System-on-Chip (SoC) designs to ensure complex clock synchronization schemes, such as FIFOs and handshakes, are correct. Bugs in faulty clock domain synchronizations between IP blocks in a chip are hard to find with conventional design tools and represent a leading cause of chip re-spins and field reliability issues.

“The Atrenta SpyGlass-CDC product provides detailed clock domain synchronization checking, useful for external IP and IP integration verification,” said Rick Bahr, vice president of engineering for Atheros. “We are pleased to adopt this EDA tool to assist us with product development efficiencies.”

“The ever-increasing use of third party semiconductor IP is creating a growing need for rigorous validation of clocking schemes,” said Mike Gianfagna, vice president of marketing at Atrenta. “Our SpyGlass-CDC product is very effective at finding these hidden chip killers early in the process. We’re delighted that Atheros has chosen SpyGlass to assist with their leading edge designs.”

About Atrenta

Atrenta is the leading provider of Early Design Closure® solutions to radically improve design efficiency throughout the IC design flow. Customers benefit from Atrenta tools and methodologies to capture design intent, explore implementation alternatives, validate RTL and optimize designs early, before expensive and time-consuming detailed implementation. With over 150 customers, including the world’s top 10 semiconductor companies, Atrenta provides the most comprehensive solution in the industry for Early Design Closure. For more information, visit Atrenta, Right from the Start!

Atrenta, the Atrenta logo, SpyGlass, 1Team, and Early Design Closure are registered trademarks of Atrenta Inc. All others are the property of their respective holders.

This press release contains forward-looking statements. Atrenta disclaims any obligation and does not undertake to update or revise the forward-looking statements in this press release.


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