Renesas Technology Introduces 32-bit SuperH Microcontrollers with 1Mbyte On-Chip SRAM for Digital Audio Systems, Media Player Accessories and Graphical Display Applications


CAN (Controller Area Network) is an automotive network specification promoted by Robert Bosch GmbH of Germany.

IEBus (Inter Equipment Bus) is a trademark of NEC Electronics Corporation.

SuperH is a trademark of Renesas Technology Corp. Other product names, company names, or brands mentioned are the property of their respective owners.

Specifications: Renesas Technology SH7262 and SH7264 32-bit SuperH Microcontrollers for Digital Audio Products and Graphical Display Applications

Item Specifications
Product names SH7262 and SH7264
Power supply voltage 3.3V/1.2V
Max. operating frequency 144MHz
Max. processing performance 346 MIPS (Dhrystone 1.1 benchmark), 288 MFLOPS [operating at 144MHz]
Operating temperature range -40 to +85°C or -20 to +85°C
CPU instructions 112 (including FPU-related instructions)
On-chip RAM 1Mbyte (for TV display, 32Kbytes also used for data storage) 64Kbytes (high-speed on-chip memory)
Cache memory 16Kbytes (divided between instruction [8KB] and data [8KB], 4-way set associative)
External memory Bus clock max. 48MHz
Support for direct connection of SRAM or SDRAM using bus state controller
Address space 64Mbytes × 7
Data bus width: External 8/16 bits
On-chip peripheral functions Multifunction 16-bit timer (MTU2) × 5 channels
16-bit timer (CMT) × 2 channels
A/D converter (10-bit resolution) [ SH7262 : 4 channels; SH7264 : 8 channels ]
USB 2.0 (Hi-Speed) specification, host or function selectable
Serial communication interface (SCIF) with 16-stage FIFO × 8 channels (support for asynchronous and clock-synchronous serial communication)
Serial peripheral interface × 2 channels
I 2 C bus interface × 3 channels
Serial sound interface × 4 channels
Clock-synchronous serial I/O with FIFO
Renesas SPDIF interface
Decompression unit
Motor-control PWM timer × 2 channels
NAND interface for external flash memory
Video-display controller
SD host interface (SD card license required)
Real-time clock
CD-ROM decoder
Sampling-rate converter
IEBus interface (optional)
CAN interface (optional)
On-chip peripheral functions (cont d) On-chip debugging functions:

- Advanced User Debugger II (AUD-II)

- User Debugging Interface (H-UDI)

Direct memory access controller × 16 channels
Interrupt controller
Watchdog timer
Clock pulse generator (CPG): Built-in PLL, max. 12x multiplication
Boot modes Boot mode 0: Boot from memory connected to CS0 space
Boot mode 1: Boot from serial flash memory (high-speed communication)
Boot mode 2: Boot from NAND flash memory
Boot mode 3: Boot from serial flash memory (low-speed communication)
Power-down modes Sleep mode
Software standby mode
Deep standby mode
Module standby mode

SH7262 : 176-pin QFP (24mm × 24mm, 0.5mm pin pitch), lead-free SH7264 : 208-pin QFP (28mm × 28mm, 0.5mm pin pitch), lead-free

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