The last one is layout to mask optimization. I mentioned DimensionPPC which provides a high level of accuracy at the advanced nodes, and the CMP process optimizer. We are introducing a version of our CMP Predictor which is targeted at the manufacturers to help them optimize the CMP process as they are developing it, as they are ramping up the CMP process at the next process node. It helps them model that and helps them optimize the actual process. Then the Cadence Mask Compose which is used to layout the reticles and the wafers, a very strong technology in the marketplace.

Have you copyrighted the WYDIWYG phrase?
I don’t know. There is a term that came out years ago WSIWYG for What You See Is what You Get. That came out I think in the seventies. It had to do with matrix printers. Our phrase is a play on that. I do not know if we have copyrighted it.

What about CMP?
CMP is the next challenge at 65 nm and more so at 45 nm. A couple of big things happen at CMP when we moved from aluminum to copper which started at 130 nm. Copper has better performance but it is also softer. When you do CMP, when you do the polishing step, the manufacturing metalization depending upon the topology of your design along with the metal fill that you add to it, you can end up with certain areas polishing deeper than other areas. You end up with hills and valleys in your design and in your manufacturing. So you sort of compound things. At the lower levels you may have small hills and valleys but they can compound on top of each other. You might have a small hill on level 4 and then on metal 5 you might have a small hill on top of that and on metal 6 and so on. So you can end up at the higher metal layers with pretty big hills and valleys. If you get to that point, you end up with the potential for what is called copper pooling which can lead to shorts between wires. We have seen that in a number of examples. In fact at CDNLive! last week, a couple of customers presented papers about the fact that they had a number of designs where they had significant yield loss due to pooling because they did not have the ability to analyze it. Even though the design was DRC clean, they did all the metal fill and they did everything they normally do but at higher metal layers they had copper pooling and significant yield loss. They took their design data bases and worked with us to create the CMP models. When they ran our tool on their design, they were able to identify about 20 CMP hot spots which was a big yield killer. What it shows is that number one a pure rule based approach can not comprend the effect from layer to layer. It does each layer separately, so you can end up with multilayer effects. You need to be able to model that impact in a 3D sort of way, looking through each layer as well as the interations between layers. That is what the CMP Predictor does. It can identify copper pooling. What you do from there is that you use that information to drive your metal fill so that it is not what you would call dummy fill. We call it intelligent metal fill. It takes a lot of the knowledge about the actual hills and valleys and applies the metal in a more intelligent way. It also does not over metal fill because every additional metal fill causes coupling capacitance that effects timing. So you want it only when you need it. That’s the big focus of the CMP Predictor. The last thing it does is that it actually understands the changes in the shapes of wires due to CMP and drives that into the timing analysis tool. When you are running timing, you can take into account what is called dishing erosion which impacts the shape of wires. Our QRC extraction tool can take this file from the CMP Predictor and use that to drive more accurate timing.

Who do you see as the competition and how does Cadence differentiate itself?
On the CMP side I think we are pretty unique. The way we differentiate is because we have been qualified by a dozen different either pure play foundries or IDMs on the manufacturing side. As far as I know we are the only one qualified at all those places other than TSMC. TSMC’s strategy has been to provide the model to all the CMP tools on the market. In that regard the competitors have models as well as us but otherwise we are pretty much unique. The Common Platform has made the statement that the CMP Predictor is their standard tool for thickness variability. The CMP Predictor is very unique in the market. The uniqueness of the litho analzyer from ClearShape comes from a couple of things. First off it is OPC agnostic. The competing tools in the market have basically taken their OPC technology to the design side. The limitation there is that if the manufacturer is using an OPC tool from vendor A, then on the design side it is only company A’s tools that would be applicable. ClearShape is independent of whatever OPC tool is being used. The other quick differentiator for the technology is that the approach they took was rather than simulating the OPC function itself, they model the entire layout to printing on silicon structure. We model that whole flow which includes more than just OPC. It includes all the effects of biasing and things like that. It is more comprehensive. The approach is also very fast. The comprehensiveness is what enabled us to get qualified very quickly before everyone else by TSMC at 65 nm and 45 nm. That it is very fast makes it applicable not just for signoff but also for doing implementation because they can do an implementation flow during the day, run litho analysis overnight and understand the impact of litho on things like timing. It considers litho much earlier in the design

How much of Cadence’s revenue or what percent of Cadence’s revenue comes form DFM?
I don’t now if I am in a position to discuss that right now. It is a key growth area for us. I can say that.
Editor: DFM accounted for 9% of revenue in 2005, 7% of revnue on 2006 and 7% of revenue for the first two quarters of 2007.

During the course of this interview you have mentioned four or five acqusitions in the DFM arena by Cadence. Why do you think that technologies like this seem to come from two guys over a garage rather than from R&D groups within a billion dollar company?
I wouldn’t say it is two guys over a garage. There are cetainly technologies that we develop internally. We have a large inernal development organization that have developed a number of technologies. A perfect case in point is the Cadence Chip Optimizer and the phase space router which was completely organically built. The Encounter Timing System and the Encoundter Timing System GXL as well. They are all technologies that are internally developed. The internal team also builds integrations and design flows. Our responsibility to the customers is to provide the best and complete flows including technologies within those flows. So when we see an acquistion that makes sense to deliver the best solution to our customer then we will decide whether we acquire or whether we partner and what is the right solution for our customer.
Editor: It is rather commonplace for large companies in this industry to acquire small startups for their technology. Of course not all startup are acquired and even fewer are going public these days. Development teams for large firms have the responsibility for enhancing broad product portfolios by increasing performance, adding features, improving usabililty, porting to new operating environments, interfacing to emerging standards and third party offerings and so forth. They also have to support customers and sales efforts. While these efforts may be relatively straightforward they present considerable demands on time and resources. Developing new technolgies from scratch is far riskier. Startups have the luxury of being able to focus on a specific problem and to use the very latest available tools. Often time their technology is based on years of research in academia. Acquiring a startup with demonstrable technology and customer testimonials minimizes the risk of developing one’s technology. And of course there is always the issue of patents.

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