Nanotechnology – Science vs. Engineering


MOSAID Technologies announced an agreement to sell “certain assets” of its IP product development business to Synopsys for approximately $15 million in cash. The agreement is expected to close in August 2007, with the payment subject to a $2 million holdback for one year. Synopsys says will hire MOSAID’s IP engineering team. There‘s additional detail in the Press Release: “Synopsys has agreed to purchase the assets and intellectual property associated with MOSAID's Double Data Rate (DDR) memory controller and Phase Locked Loop (PLL) product families. In connection with the transaction, Synopsys will also receive an exclusive license to certain patents and pending applications associated with MOSAID's current memory controller and PLL product lines.”

John Lindgren, President and CEO at MOSAID, is quoted: "With the sale of our Semiconductor IP assets to Synopsys, we will move forward as a pure-play intellectual property company focused on patent licensing and advanced memory R&D. Our Semiconductor IP group has successfully developed and sold best-in-class technology and products to the global semiconductor industry. We decided that these assets would perform better in the hands of an industry leader with complementary product lines and the scale to succeed in a competitive market, allowing us to concentrate on our core business."

ProDesign announced CHIPit Iridium Edition version 5. Per the Press Release: “V5 gives ASIC and SoC design engineers unprecedented speed and flexibility to verify and debug their designs … It can be scaled from 1 up to 6 FPGAs Xilinx Virtex-5 FPGAs and handles ASIC design capacities up to 8 million ASIC gates.”

Sequence Design announced a collaborative licensing agreement with Faraday Technology Corp. to bundle Sequence’s PowerTheater tool suite with Faraday’s Design Kit for its U.S. customers. Per the Press Release: “Once the designers are satisfied with the trade-off of performance, area, and power, they can [migrate those] power techniques into the synthesis and place & route stage with Faraday's … PowerSmart design flow methodology.”

Solido Design Automation announced integration of its new transistor-level statistical design and verification technology with Cadence's Virtuoso Analog Design Environment and Virtuoso Spectre Circuit Simulator. Per the Press Release: “Solido is currently working with customer partners and will announce its transistor-level statistical design and verification tool suite in the next few months.”

Synopsys announced that NetLogic Microsystems used Synopsys’ NanoTime transistor-level static timing analysis tool to tape out its “next-generation knowledge-based processor … [The] 65-nanometer processor was optimized for high-performance packet processing and low power consumption.”

Synopsys also announced that ProMOS Technologies is using Synopsys' Proteus OPC software as the company’s production standard for advanced process technologies. Per Peter Zhao, senior director for R&D at ProMOS: "Using Proteus, we achieved the most accurate OPC correction, as well as impressive cost-of-ownership improvements, at the advanced technology node."

VaST Systems announced $12 million in Round D funding led by ZenShin Capital, with participation from previous investors Allen Buckeridge, Foundation Capital, and Mohr Davidow Ventures. Takeshi Mori.

Valens Semiconductor Ltd. announced a $7 million series A round of equity financing, led by Genesis Partners along with Magma Venture Partners. Not surprisingly, Eyal Kishon of Genesis Partners and Eitan Dekel of Magma Venture Partners will join the Valens Board of Directors. In addition, Yossi Kofman will join the company's advisory board.



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