Tensilica Presents "Reduce Power and Energy Consumption in Low-Power SOCs Through ISA Extension"

—(BUSINESS WIRE)—July 13, 2007— Tensilica, Inc.:
What:  Tensilica, Inc., will present a live webcast, "Reduce Power and
       Energy Consumption in Low-Power SOCs Through ISA Extension,"
       highlighting the abilities of configurable processors and
       discussing three specific, detailed task examples
       (AES encryption, Viterbi decoding, and FFTs) that benefit from
       this design approach.

       Main discussion points include:

    -- Configured processor cores can reduce task energy consumption
       by more than 10x
    -- Many types of tasks can be accelerated using processor
       configuration
    -- Configured processor cores reduce manual RTL coding and
       verification in low-power applications
    -- Buses are not the ideal choice for low-power, on-chip
       interblock communications


Who:   The presenter for the July 18th broadcast will be
       Steve Leibson, Technology Evangelist, Tensilica.

       Tensilica, Inc., is the recognized leader in configurable
       processor technology and has leveraged that technology to
       become the leading supplier of licensable controllers and DSP
       cores for mobile audio and video applications. Tensilica
       offers the broadest line of controller, CPU, network, and
       specialty DSP processors on the market today - including full
       software toolchain and modeling support - in both an
       off-the-shelf format via the Diamond Standard Series cores and
       with full designer configurability with the Xtensa processor
       family. The modern design behind all of Tensilica's processor
       cores provides semiconductor companies and system OEMs with the
       lowest power, smallest area solutions for high-volume products
       including mobile phones and other consumer electronics,
       networking and telecommunications equipment, and computer
       peripherals.


When:  The live webcast will take place on Wednesday, July 18, at
       11:00 a.m. P.T. Afterwards, it will be available on demand from
       the EDN archives.


Where: To attend the webcast, participants can register by going to
       Tensilica at http://tensilica.com/news_events/events.htm


Contact:

Powelson Communications
Erika Powelson, 831-424-1811
Email Contact




Review Article Be the first to review this article
Synopsys: Custom Compiler

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Diversity: Really, who cares
More Editorial  
Jobs
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
Senior Methodology Automation Engineer for EDA Careers at San Jose, CA
DDR 3-4-5 Developer with VIP for EDA Careers at San Jose, CA
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
Proposal Support Coordinator for Keystone Aerial Surveys at Philadelphia, PA
Upcoming Events
11th International Conference on Verification and Evaluation of Computer and Communication Systems at 1455 DeMaisonneuve W. EV05.139 Montreal Quebec Canada - Aug 24 - 25, 2017
The Rise of Mechatronics at Dassault Systèmes San Diego 5005 Wateridge Vista Drive San Diego CA - Sep 12, 2017
The Rise of Mechatronics at Buca di Beppo - Pasadena 80 West Green Street Pasadena CA - Sep 13, 2017
S2C: FPGA Base prototyping- Download white paper



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy