DAC & DFM – Once More, with Feeling

DAC looms. It’s less than 14 days to San Diego. Nobody’s ready. Nobody’s sleeping. Everybody’s in a state. Everybody’s frantic. Everybody’s wondering if this, that, or the other thing will get done in time for the opening bell. How did it come to this? Didn’t we promise ourselves last year that we’d be on time this year, ahead of schedule even?

Okay, okay. So it turns out we‘re all mortal after all. Whatever. Here are a few suggestions that may help:

1) Stand up. Take a deep breath. Sit down. It’s all going to get done.

2) If you need a hotel in San Diego, go book one now. If you need a plane flight to San Diego, go book one now. If you haven’t registered for the conferencego do it now.

3) Once again, stand up. Take a deep breath. Sit down. It’s all going to get done.

4) See that “Print” button up on the upper right quadrant of this page? Click on it to see this newsletter all on one page. That will save some time not having to click through.

5) Get a cup of coffee. (Decaf would be best at this point, don’t you think?)

6) Read this article to completion. It’s a survey about DFM, and it’s pretty darn interesting. Particularly the part about who the Big Players are in DFM (see Question #9), and the part about what the Big Guys in EDA are going to do, or not do, about the Small Guys in DFM (see Question #10).

Oh yeah, and check out the part where folks are estimating the size of the DFM market (Question #11). Turns out everybody thinks it’s bigger than a breadbox, but probably not bigger than $500 million. There is a vote or two in there, however, for $1 billion or more. Hmmm. “Dollars for Marketing?” Should it be instead, “Dialing for Mega-Millions?”

7) Once again, stand up. Take a deep breath. Sit down.

8) Consider coming to the Workshop for Women in Design Automation at DAC. You think it’s just for the “weaker sex“? Think again. It’s for everybody/anybody who wants to learn about leadership, career development, career transitions, and balancing things like work and personal life. You already know how to do all that stuff? Lucky you.

9) Finally, give kudos to Cadence. They’re the ones who, for 14 years now, have coordinated and seriously subsidized the annual Stars & Strikes Bowling Tournament, the Silicon Valley fundraiser. Last Saturday, May 12th, they were out in force at the “300 Bowling” alley in San Jose (who, by the way, donated their facilities to the event). And the folks from Cadence were not alone. Over 200 companies pitched in this year to support this fundraiser, including EDA folks like Denali, Magma, Synopsys, DesignAdvance, Clear Shape, LogicVision and Si2  – many bowling in lanes right near Cadence’s. (Is that called bowling “adjacencies“?)

There were also lots of people from the San Francisco 49ers’ organization on hand, including most of the coaching staff, lots of hunkahunka players, and one or two sparkly 49er cheerleaders, as well. In fact, there were so many hundreds of people packed into that bowling alley between noon and 4 PM, the caterers might have feared they’d run out of food and beer, but I’m sure they didn‘t. The Cadence team looked far too organized to have let that happen.

Oh yeah, and there was a silent auction, and a live auction, and live music courtesy of Rockin/Rollin Ted Vucuravich (Cadence CTO) and The Chad Tuckers Band, and lots of other folks who appear to have brought the whole family to the event. And, as an added bonus, there was the amazing sight of huge football players bowling right along side some (slightly less bulky) software developers and CEOs, including Cadence‘s Mike Fister, Denali‘s Sanjay Srivastava, and NVIDIA’s Jen-Hsun Huang.

I think you get the picture. It was pretty awesome. No wonder that last Saturday’s event raised over $1 million in the course of the afternoon. That’s a lot of money. This year’s recipient? The Silicon Valley Women’s Initiative, working to help lower-income women start businesses. The 2005 recipient was the Fisher House for families of wounded veterans on the campus of the Palo Alto VA Hospital. Well done, Cadence!

Okay … See you all in San Diego!

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Design for Manufacturing – Once more, with feeling

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Panelists:

Atul Sharan – President and CEO, Clear Shape
Chenmin Hu – President, Anchor Semiconductor
Dave Holt – CEO, Lightspeed Logic
Dave Reed – Vice President of Marketing, Blaze DFM
Gary Smith – President, Gary Smith EDA
Joe Sawicki – Vice President and GM of Design-to-Silicon Division, Mentor Graphics
John Lee – GM of Physical Verification Business Unit, Magma Design Automation
Kamal Aggarwal – Vice President of Marketing and Strategy, SoftJin Technologies
Michael Buehler-Garcia – VP of Marketing and Busn. Development, Ponte Solutions
Mitch Heins – Vice President of Business Development, Pyxis Technology
Prasad Subramanian – Vice President of Design Technology, eSilicon
Prashant Maniar – Chief Strategy Officer, Stratosphere Solutions
Rob Aitken – Fellow, ARM
Srini Raghvendra – Senior Director of Marketing for DFM solutions, Synopsys
Sudhakar Jilla – Director of Marketing, Sierra Design Automation
Tom Wong – Vice President of Marketing, Takumi Technology
Yervant Zorian – Vice President and Chief Scientist, Virage Logic
Ken Potts – Vice President of Product Marketing, Virage Logic

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Questions and Answers – A Baker’s Dozen

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1) DFM is not new, but some parts of it are newer than other parts. Please list the 3 oldest parts, and the 3 newest parts.

Atul Sharan – The oldest elements of DFM are Rules, Extraction Tables, and Spice Models. The newest aspects are Variability, Models, and a Model-based infrastructure that supplements a rule-based infrastructure.

Chenmin HuThree oldest parts: DRC, OPC, and PSM. Three newest parts: full-chip post-OPC verification, model-based litho-friendly design, hardware-accelerated litho simulation.

Dave HoltOld Design Rules become New Design Guidelines. Old LVS/DRC become New LVS/DRC/DFM. Old PVT characterization becomes New 20+ corners characterization.

Dave ReedOldest: 1) Plain vanilla design rules; 2) Defect yield focus (via doubling, wide wires with slotting, end-of-line routing rules); 3) Resolution enhancement techniques (optical proximity correction, phase shift masks). Newest: 1) Electrical DFM (parametric yield focus); 2) Leakage power reduction (multi-Vt libraries; transistor gate-length biasing); 3) Process-aware analysis and optimization.

Gary SmithThe older parts are rule-based, the newer parts are model-based. Also, we are seeing many of the new tools use parallel processing to speed up their tools.

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