Impinj Announces Semiconductor Industry's First Multi-Time-Programmable Nonvolatile Memory IP Qualified in 90-nm Process Technology

SEATTLE, WA -- (MARKET WIRE) -- Mar 28, 2007 -- Leading logic nonvolatile memory (NVM) intellectual property (IP) supplier, Impinj, Inc., today announced the qualification of the company's AEON®/MTP NVM in the 90-nanometer Logic CMOS manufacturing process at Taiwan Semiconductor Manufacturing Corporation (TSMC).

The first-ever multiple-time-programmable (MTP) NVM IP qualified and released for production at the 90-nanometer process node, Impinj's AEON®/MTP cores provide the cost, power and functionality benefits of embedded NVM in standard logic CMOS (also known as Logic NVM). Unlike older memory technologies, such as embedded Flash, that require additional, expensive manufacturing steps, AEON®/MTP cores integrate easily into system-chips designed in the most advanced and cost-effective processes.

"Many of the most exciting system-chip designs target high-performance 90-nanometer processes, but those designs were unable to reap the feature and functionality advantages of embedded multiple-times-programmable NVM until now," said Larry Morrell, vice president of IP Products at Impinj. "Impinj is delighted to be the first company to address this significant design requirement with Logic NVM IP that is two process nodes ahead of embedded flash offerings."

Embedded in more than 300 million chips, Impinj's AEON/MTP NVM cores retain crucial system information even when power is turned off. Ideal for portable devices, such as multi-function cell phones that require simultaneous storage of several types of system data, AEON/MTP NVM cores store information such as encryption keys for digital rights management, configuration settings for Bluetooth or WiFi connections, custom personalization settings in baseband processors, and precision analog trim values for the audio and display drivers.

The qualified 90-nanometer AEON/MTP NVM IP comprises hard macro cores in 8-bit to 256-bit configurations with parallel data output enabling instant access to all data bits. Additional features include zero-power read operation, integrated high voltage circuitry, 10-year data retention and up to 50,000 write/erase cycles.

An alternative to costly embedded Flash memory and cumbersome off-chip EEPROM, AEON/MTP NVM cores are available for license through Impinj's "Try it Now" six-month free evaluation program (

Impinj leverages deep semiconductor design and process expertise to ensure its portfolio of NVM cores demonstrate the highest levels of performance, reliability and ease of integration for customers. Impinj NVM cores undergo stringent and well-documented quality, performance and manufacturability testing, and are available at the world's leading foundries at 0.25-, 0.18-, 0.13-micron and 90-nanometer technology nodes.

To request datasheets and additional information on Impinj's AEON logic nonvolatile memory, please visit

About Impinj, Inc.

Impinj, Inc. is a semiconductor and RFID company whose patented Self-Adaptive Silicon® technology enables its two synergistic business lines: high-performance RFID products and semiconductor intellectual property (IP). A leading contributor to the RFID standards for high-volume supply-chain applications worldwide, Impinj leverages its technical expertise and industry partnerships to deliver the GrandPrix™ solution, comprising tags, readers, software and systems integration to offer RFID that just works™. Impinj's innovative IP products, core to the company's RFID tags, are licensed to leading semiconductor companies worldwide, allowing them to seamlessly integrate crucial nonvolatile memory (NVM) alongside analog and digital functionality on a single chip. Impinj's IP products include the popular AEON® family of embeddable cores, which provides rewriteable NVM technology in logic CMOS manufacturing. For more information, visit

Image Available:


Jim Donaldson
Impinj, Inc.

Email Contact

Lynda Kaye
Mango Communications for Impinj

Email Contact

Review Article Be the first to review this article
Featured Video
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Job Openings: Can EDA Predict the Future
More Editorial  
Technical Support Engineer Germany/UK for EDA Careers at San Jose, CA
Test Development Engineer(Job Number: 17001697) for Global Foundaries at Santa Clara, CA
ASIC Design Engineer for Ambarella at Santa Clara, CA
Lead Java Platform Engineer IOT-WEB for EDA Careers at San Francisco Area, CA
Senior FPGA Designer for Fidus Electronic Product Development at Fremont, CA
Upcoming Events
CDNLive Silicon Valley 2017 at Santa Clara Convention Center Santa Clara CA - Apr 11 - 12, 2017
10th Anniversary of Cyber-Physical Systems Week at Pittsburgh, PA, USA PA - Apr 18 - 21, 2017
DVCon 2017 China, April 19, 2017, Parkyard Hotel Shanghai, China at Parkyard Hotel Shanghai Shanghai China - Apr 19, 2017
Zuken Innovation World 2017 at Hilton Head Marriott Resort & Spa Hilton Head Island NC - Apr 24 - 26, 2017
S2C: FPGA Base prototyping- Download white paper

Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy