SAN JOSE, Calif.—(BUSINESS WIRE)—February 13, 2007— FSA, the global voice of the fabless business model, announces the availability of its Hard IP Quality Risk Assessment Tool version 1.2. This tool is the first deliverable in the FSA IP ecosystem Tool Suite addressing the pain points of IP integration.
The Suite offers productivity tools to enable more efficient
communication between IP vendors, IP integrators - fabless companies
and integrated device manufacturers (IDMs) - as well as foundries. It
enables evaluation of the risk and applicability of hard IP across the
design process - from pre-purchase to licensing to process technology
selection to manufacturability - all areas critical for design, yield
and tape-out success.
The IPe tools create effective communication:
-- Enabling integrators to ask appropriate questions.
-- Allowing a structured and weighted approach to vendor
-- Providing a qualitative, yet effective, method for answer
FSA Hard IP Quality Risk Assessment Tool
The first tool in the Suite, the FSA Hard IP Quality Risk
Assessment Tool, collects information about an IP vendor, its design
methodology and the IP under evaluation, to enable risk assessment
across seven criteria: IP design, integration, verification, process
technology, product documentation, reliability and test.
Key features of this tool include:
-- A minimal number of questions to be answered by vendors.
-- A methodology to accurately and objectively allow an
integrator or foundry to assess the IP and IP family.
-- A comparison capability to allow findings and completed
questionnaires to be weighted against up to 20 different
pieces of IP.
Usage models include:
-- Third-party IP evaluation and comparison for integrators.
-- Evaluation of IP quality within IP repositories such as
foundry IP programs.
-- Internal IP reuse evaluation for fabless companies or vendors
that create their own IP.
Representatives from industry-leading semiconductor, foundry,
electronic design automation (EDA) and semiconductor IP (SIP)
companies have collaborated to create this industry best practices
tool. With industry adoption, the overall quality of hard IP cores
will improve, lowering the cost of IP integration and decreasing time
spent evaluating hard cores, making the process more cost effective
"Accelerating time-to-market, reducing costs and minimizing risks
are key factors all semiconductor companies are concerned with as they
develop their products," said Jim Ensell, chairman of FSA's IP
Subcommittee. "The work FSA has done to develop the Hard IP Quality
Risk Assessment Tool directly addresses these key issues. Vendors
should be pleased to participate in and support these efforts that
will help companies proceed with confidence as they increasingly look
to third-party IP suppliers to help them meet their SoC design
FSA's Hard IP Working Group has developed the FSA Hard IP Quality
Risk Assessment Tool to benefit the IP vendor, integrator and
foundries involved in SoC design.
"A fundamental set of costs and risks to IP vendors and
integrators working in different teams, locations and companies
currently burdens the overall market cost of IP and, in turn, stifles
IP fluidity and competition," said Dr. Raminderpal Singh, Systems and
Technology Group at IBM, chair of the Hard IP Working Group and
technical lead of the FSA IPe initiative. "Streamlined and effective
metrics at IP hand-off is an intelligent and cost-effective way to
understand and minimize these 'hidden' costs. This effort has brought
together vendors and integrators from across the industry to create an
'apples-to-apples' comparison of hard IP cores."
FSA solicited foundry involvement early in the hard IP effort.
Foundry participants include Chartered Semiconductor Manufacturing,
IBM, Samsung, SMIC, TSMC and UMC.
"We knew that foundry support for hard IP would be a critical
element in making this a unified and industry-accepted baseline best
practices tool. Coupled with the foundries' internal IP quality
programs, we feel the Hard IP Quality Risk Assessment Tool is a strong
determinant in identifying quality IP for the end user and in
clarifying risk one may choose to undertake," said Lisa Tafoya, vice
president of global research for FSA.
Companies that have contributed to the development of the tool
include: Avago Technologies; Cadence Design System, Inc.; Cirrus
Logic; Freescale Semiconductor; IDT; Impinj, Inc.; Knowlent
Corporation; LSI Logic; Mentor Graphics; PMC-Sierra and Synopsys, Inc.
"PMC-Sierra has been committed to the development of the FSA hard
IP quality tool because the industry needs high-quality third-party IP
for innovation and growth," said Norbert Diesing, director of
technology forecasting at PMC-Sierra. "This tool presents a
baseline for discussion between IP vendors and IP integrators that
enables focus to be drawn quickly to resolving any areas of concern.
This is a win/win for the industry."
Additional quotes from companies that have provided support of the
hard IP quality worksheet are available at
IP ecosystem Roadmap
Enhancements to the FSA Hard IP Quality Risk Assessment Tool will
be introduced in version 2.0 in Q2 2007.
FSA has begun development on the second tool in the Suite focused
on third-party IP licensing to aid the negotiation process. It will
leverage the programming and format of the Hard IP Quality Risk
Assessment Tool with a set of standardized questions addressing
intangible aspects of IP licensing. It will build upon the initial
work of FSA's IP subcommittee published in FSA's whitepaper, "The
Current State of Semiconductor Intellectual Property Licensing." This
tool is slated for release in Q3 2007.
The next two tools will address technology and manufacturability
of IP. These efforts will begin this year with planned releases in
The tools are a result of a collaborative effort from FSA members.
FSA seeks additional participation; visit www.fsa.org/committees/ip
for more information and to get involved.
FSA is the voice of the global fabless business model.
Incorporated in 1994, FSA positively impacts the growth and return on
invested capital of this business model to enhance the environment for
innovation. It provides a platform for meaningful global collaboration
between fabless companies and their partners; identifies and
articulates opportunities and challenges to enable solutions; and
provides research, resources, publications and survey information.
Members include fabless companies and their supply chain and service
partners, representing more than 21 countries across the globe.