Retrospective and Perspective on Printed Circuits – Happy Holden


  • Cadence expects total revenue in the range of $1.458 billion to $1.468 billion. In 2005 the total revenue was $1.33 billion.
  • Synopsys expects revenues in the range of $1.1.8 billion to $1.205 billion compared to $1096 billion in 2005.
  • Mentor expects revenue of approximately $774 million compared to $705 million in 2005.
  • Synplicity expects revenue of $63.6 million compared to $61.9 million in 2005.

    According to historical figures, it has been first time in more than 5 years that EDA industry has strung together consecutive quarters of double-digit growth

    Intel's Transistor Technology Breakthrough Represents Biggest Change to Computer Chips in 40 Years. Intel revealed that it is using two dramatically new materials to build the insulating walls and switching gates of its 45 nm transistors. Hundreds of millions of these microscopic transistors -- or switches -- will be inside the next generation Intel Core 2 Duo, Intel Core 2 Quad and Xeon(R) families of multi-core processors. The company also said it has five early-version products up and running -- the first of fifteen 45nm processor products planned from Intel. The company will use a new material with a property called high-k, for the transistor gate dielectric, and a new combination of metal materials for the transistor gate electrode.

    Magma Reports Record Revenue of $45.1 Million for Third Quarter Magma Design Automation Inc. reported record revenue of $45.1 million for its fiscal 2007 third quarter. This represented an increase of 9.1 percent over the year-ago third-quarter revenue of $41.3 million. Magma reported a net loss of $(13.6) million, or $(0.37) per share (basic and diluted), for the third quarter, compared to a net loss of $(8.1) million, or $(0.23) per share (basic and diluted), for the year-ago third quarter.

    STMicroelectronics Tapes Out 65-NM Mixed-Signal Design Using Cadence Space-Based Router

    Gidel Releases The Fastest, Scalable Soc/ASIC Verification System Built On Reconfigurable Technology GiDEL released the PROC_SoC™ Verification System. The PROC_SoC is designed to debug and verify SoC designs of diverse styles from 5 to 100+ million gates in size using one or more reconfigurable PROC30M™ SoC Verification modules. The PROC_SoC system sets a new standard for verification system performance, price/capacity, interconnect flexibility, and ease-of-use. The system is architected and designed to operate at system clock speeds up to 300MHz.



    Other EDA News

  • Cadence Helps Jennic Tape Out Leading-Edge ZigBee IC
  • Synopsys Donation of Variation-Aware Extension to SPEF Format Approved by IEEE 1481 Working Group Silicon Image Supplies Samsung With HDMI(TM) 1.3 Transmitter for Blu-ray Disc Player and HDMI 1.3 Receiver and Switches for HDTVs
  • LogicVision Reports Fourth Quarter and Fiscal Year 2006 Financial Results
  • DDR PHY Interface Specification Version 1.0 Released
  • Bandspeed Optimizes Packaging, Power With Sequence's PowerTheater
  • Sun Microsystems and Mentor Graphics Collaborate to Provide Solaris 10-based EDA Solutions on x64 Platforms
  • Mindray Honors Altera With 'Outstanding Contribution Award'
  • Cadence Enables Silicon & Software Systems to Design Record-Breaking Low-Power Chip
  • MSI Computer Selects Silicon Image's SteelVine(TM) SiI4723 Storage Processor for New Enthusiast Motherboard Line
  • Altera Announces Date of Fourth Quarter Earnings Release and Conference Call
  • Agilent Technologies Announces Breakthrough High-Frequency SPICE Simulation Technology for High-Speed Digital Board Design
  • Fukuoka Intelligent Cluster Laboratory Chooses eASIC's Nextreme Devices for its Unique System-in-Package (SiP) Development
  • SiSoft Addresses the Challenges Facing Today’s Serial Link Designers at DesignCon 2007
  • ADVISORY/ VaST Systems to Demonstrate Virtual System Prototyping for Embedded Systems Design at Embedded World
  • Gidel Releases The Fastest, Scalable Soc/ASIC Verification System Built On Reconfigurable Technology
  • Altera's FPGAs Are First to Demonstrate Support for PCI Express 2.0
  • Reminder - Real Intent Showcases Assertion-Based Verification Software at Events in California and Japan
  • Media Advisory: Cadence Space-Based Router Chosen by DesignCon as DesignVision Award Finalist
  • EVE to Exhibit Latest Addition to ZeBu Family During DesignCon
  • Synopsys Named IBM-Authorized Power Architecture Design Center
  • Altera, National Semiconductor and MorethanIP Announce First 8-Port Switch Development Board With IEEE 1588 Timing Control
  • Cadence Delivers Industry's First Complete Low-Power Solution
  • Reminder - Chip Estimate Participates in TecForum and Panel at DesignCon
  • Synplicity's Certify Software Eases ASIC Prototyping with Support for Xilinx Virtex-5 FPGAs
  • Athena Design Completes Series B Funding, Two New Investors Join EDA Start-up
  • VeriSilicon Launches New Families of Advanced Audio / Video Application Platforms to Accelerate Portable Multimedia Designs
  • Magma Expands Operations in India and U.S.
  • Intel's Transistor Technology Breakthrough Represents Biggest Change to Computer Chips in 40 Years
  • eASIC and MoreThanIP Partner to Deliver Tri-Mode (10/100/1000) Ethernet MAC Solutions for Nextreme Structured ASICs
  • Analog Devices and Legend Silicon Open Design Lab in Shanghai to Address Emerging Market for Mobile TV
  • Exclusive Management Day Seminar at 44th DAC to Focus on Innovation
  • SANYO Adopts Altera's HardCopy Structured ASIC for Award-Winning Home Theater Projector
  • Denali PCI Express Product Passes First PCI Express 1.1 Compliance Testing in USA
  • SiSoft awarded U.S. Patent for key software technology
  • Key Players from the IC Industry Join Kilopass at DesignCon to Discuss Memory Needs and Options for Consumer Products
  • Challenges in Engineering Education Discussed at DesignCon 2007 as Dr. Leah Jamieson Serves Keynote Address
  • STMicroelectronics Tapes Out 65-NM Mixed-Signal Design Using Cadence Space-Based Router
  • Altera FPGAs Address Design Challenges at DesignCon 2007
  • Magma Reports Record Revenue of $45.1 Million for Third Quarter
  • Magma Announces Third-Quarter Earnings Call
  • Nominations Open for Marie R. Pistilli Women in Electronic Design Automation Achievement Award

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