Verification - There's a great panel happening on Thursday, July 27th, from 10:30 AM to 12:00 Noon in Rooms 306-308 at Moscone Center. The topic is, "Building a Verification Plan; Trading Brute Force for Finesse." Multiple, well-known luminaries from the world of verification will be one the panel: Harry Foster from Mentor Graphics, Janick Bergeron from Synopsys, Andy Piziali from Cadence, Raj Mitra from TI, Doron Stein from Cisco, and Catherine Ahlschlager from Sun. I spoke at length last week with Craig Cochran, Vice President of Marketing at Jasper Design Automation, and Rajeev Ranjan, CTO at Jasper, about the topic of this panel, and the importance of the discussion. They told me that half, if not more, of the battle for successful verification in a project is won by having a verification plan in hand before forging into the unknown territories of product development. We will hear more from Craig and Rajeev on the topic in conjunction with details from the panel discussion at DAC in my post-DAC wrap-up. Meanwhile, I look forward to seeing all of you on the 27th!
VHDL at DAC - The VHDL Technical Committee Meeting follows on the heels of the OVL meeting, Wednesday, July 26th, from 3:30 PM to 5:30 PM, also at the Marriott Hotel, in Golden Gate Room B2.
Will Ruby, Vice President of Marketing at Golden Gate Technology - Golden Gate Technology will be demonstrating an improved version of its power reduction and optimization software, PowerGold (formerly called Power Optimize Gold), at DAC. The software complements industry-standard cell physical design flows delivers 10-to-20 percent or more power savings, and offers faster run times than the previous version.
Women in EDA - Are there any? Well, of course there are - but after decades of attempting to encourage young girls to pursue degrees in science and engineering you would think we would be farther along. But we're not, and hence the Workshop for Women in Design Automation continues to serve an important role at DAC. This year, WWINDA will take place on Monday, July 24th, from 9:00 AM to 12:45 PM in Moscone Center, Room 302, followed by lunch. Workshop chair is Dataquest's Daya Nadamuni, and vice chair is Virage Logic's Sabina Burns. The topic of the day will be applying the 80/20 rule to balancing career and non-career related demands on time. The keynote address will be delivered by nVidia's Reynette Au, plus this year's recipient of the Marie R. Pistilli Women in EDA Achievement Award, IBM's Ellen Yoffa, will be honored. Yoffa will also be featured, along with Cadence's Jan Willis and the Anita Borg Institute's Telle Whitney on a DAC Pavilion Panel on Tuesday, July 25th, at 2:00 PM. I will be moderating that discussion, where the panelists will talk about professional development and the challenges that come over the course of a successful career.
San Francisco is my hometown, so a few quick rules. It's never Frisco, it's very cold in July, and any references to hippies, the Summer of Love, or anything even vaguely homophobic are tiresome and never funny. But, let me assure you - no matter what comments you let drop, they won't detract from the eternal magic of The City. They will only show you to be a provincial who doesn't get what Northern California is all about. This is a place of tolerance, culture, and innovation. Silicon Valley may be the brains of Northern California, but the heart of the place is definitely in San Francisco, high on a hill, above the blue and windy sea. So, come to DAC, and enjoy this lovely, lovely place. I do believe it is the most beautiful city on earth.
Addendum on DFM
Prashant Maniar, Chief Strategy Officer, Stratosphere Solutions - Prashant submitted these answers to questions he saw listed in the July 3rd issue of EDA Weekly. They are useful here as an addendum to The Buzz, as a reminder of the issues that will be on the table multiple times at DAC.
If you're making money in the DFM market, briefly tell me what technology you're selling. Please be succinct. I'm easily confused here (not kidding!).
Stratosphere Solutions is vending silicon-proven tools and applications for yield ramp, specifically focused on characterizing parametric variability, a rapidly growing yield loss mechanism at sub-100-nanometer process technologies. Our technology provides very high resolution analog measurements of critical process parameters in very small amounts of silicon real estate.
Has the skepticism over DFM subsided a bit over the last 18 months as far as being a revenue-generating business opportunity - in other words, are DFM vendors silencing their critics by actually making some money?
Yes and No. Several DFM (non-OPC/RET/TCAD) vendors are generating limited amount of revenue. How many vendors can turn it into a sizeable, repeatable revenue stream and significantly profitable business is yet to be seen. The number of companies offering litho-centric DFM tools is large and this segment will succumb to price pressure sooner than later (the fate of many sustainable, i.e. non-disruptive, innovations in EDA). Companies that deliver truly disruptive technologies in a manner that does not disrupt the design flow will, in the long term, demonstrate strong financial health.
If OPC/RET and wire spreading have been around for a while, what is the 'new' part of DFM that seems to be generating so much interest?
DFM is being used as a “catch-all.” The majority of the DFM companies are focused on modeling lithography and CMP, i.e. systematic, effects, and bringing them into the design flow. Some are focused on point tools for characterizing and modeling parametric variability, and analyzing its impact on design performance. We look at it from a holistic design for (parametric) yield (DFY) perspective rather than just manufacturability. The exciting aspect of taking this direction is building an innovative pattern-oriented, empirical model based, statistical tool infrastructure (for manufacturers as well as designers) and integrating it into the design and manufacturing flow.
Why did Numerical Technologies get acquired by Synopsys? Why wasn't there enough of a market to offer an opportunity to IPO, or at least to stay an independent entity?
I can't comment on the deal since I wasn't involved. However, an appropriate question asked, especially by investors, is: Can a DFM/DFY company function as a stand-alone entity over the long term? Yes. With the right strategy, a DFM/DFY business can be highly profitable $100M+ business.
Is DFM still in the 'educational' phase, both with respect to engineers and the VC community?
Definitely! The notion of yield improvement/DFM/DFY is evolving, albeit rapidly, both technologically and market-wise. Phase-0 was about RET/OPC. Phase-1 has been about designers becoming more educated about the process (e.g., litho, CMP, etch, etc.). The next phase will be about moving from commonplace edge-based and deterministic approaches to a pattern-based statistical model driven world.
If you had $10 million tomorrow from an investor, how would you spend it enhancing your DFM offerings, or what additional tools would you buy from your DFM vendor, if you're a user?
In addition to our current product offerings, we have built significant algorithmic IP in areas such as statistical modeling and analysis. We would spend that money in productizing that IP and working with customers to accelerate adoption of those products. So we would spend proportionally on R&D, AEs, and marketing. We also need to invest in market education for the benefit of these statistical methods for parametric yield improvement.