DIAMOND in the Rough?
At the center of this litigation are the actions of a key Magma employee that had previously worked at Synopsys. As discussed in the earlier article an individual's attractiveness to potential employers is often a function of specific experience and knowledge rather than IQ or general technical acumen. It is often difficult to separate out proprietary material of a current or former employer from an individual's knowledge. Employer sometimes use non-compete clauses in employment contracts to protect their trade secrets. These can be difficult to enforce particularly in California unless there is some form of compensation to the employee. Most non-compete clauses also contain provisions to prevent recruiting of current employees by former employees. A firm hiring someone from a competitor should in their own best interests remind new hires of their obligations to past employers. Some companies may try to erect a Chinese wall to isolate the new hire from projects related to prior employment. Some firms in their efforts to protect their intellectual property take legal action to prevent former employees from joining the competition or restricting their activities once the have joined.
A recently highly publicized example is the case of Kai-Fu Lee. Lee joined Washington State-based Microsoft in 2000. He helped established MS research center in Beijing, In July 2005 Lee joined Google in July to lead the California-based Internet search engine company's expansion into China. He was to oversee a research and development center that Google plans to open in China Microsoft sued Google and Lee, who is known for his work on computer recognition of language, a key problem in search technology. Microsoft contends that Lee's duties would violate the terms of a non-compete agreement he signed as part of his Microsoft employment contract. Microsoft also accused Lee of using insider information to get his job at Google. MS attorneys have made a lot of an email that Lee sent to Google executive stating “I am currently the corporate vice president at Microsoft working on areas very related to Google”. MS alleged that Lee sent confidential documents about the company's China strategy to Google a month before he was hired, although Google insists all the material that Lee relayed to Google had been made public previously. MS further alleges that before resigning from Microsoft, Lee began to help Google plot its China strategy with a series of suggestions, including recommending possible sites for the new office. Google countersued to invalidate the MS employment contract. Incidentally, Washington Sate law allows for enforcement of “reasonable” employment contracts.
Among the nuggets emerging from this case is allegation that MS CEO Steve Ballmer vowed to "kill" internet search leader Google in an obscenity-laced tirade during an exit interview with a software engineers who was resigning to join Google. Balmar says that this characterization of that meeting is not accurate. Lee says that he was threatened with a lawsuit in meetings with Gates and Balmar.
According to court documents Google paid Lee a $2.5 million signing bonus and promised a $1.5 million bonus after one year, plus a $250,000 salary and options on 10,000 shares of Google stock.
In mid September a judge ruled that Lee could begin working for Google in China immediately, but with limitations. According to his ruling Lee can not be involved in anything technical at Google for at least the next four months, and he can't have any budgetary or hiring authority during that period. However, he can use his knowledge of China's business community and his contacts in China's government and universities to help Google find the best space for its operations and to recruit engineers. He can also give promotional speeches about Google in China. Lee is barred from hiring anyone away from Microsoft and from using confidential information he learned during his employment there. A trial is schedule for January. Stay tuned.
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Synopsys to Acquire HPL
Technologies, Inc., a leader in yield management software and test chip solutions. IN an all cash transaction Synopsys will acquire HPL for approximately $13 million, or $0.30 per share. The transaction will require HPL shareholder approval. It is expected to close during Synopsys' first quarter of fiscal 2006 and is subject to customary closing conditions.
IEEE approves property language standard The new standard, IEEE 1850, “Standard for PSL: Property Specification Language,” specifies the design behavior of electronic systems using properties, assertions and other approaches. It was developed within the IEEE Standard Association's Corporate Program. IEEE 1850 refines the Accellera PSL 1.1 specification which provides for property-based verification
Samsung Electronics to invest $33 billion in semiconductor manufacturing facilities This is the second round of investments in its Hwaseong semiconductor plant. As part of the company's seven-year investment plan for the site. Hwaseong's second phase will be located on 230-acres that is slated to house one R&D facility and eight fabrication lines by 2012, calling for an estimated capital expenditure of $33 billion.
EDA Industry Reports Flat Revenue in 2nd Quarter of 2005 EDA Consortium's Market Statistics Service announced that EDA industry revenue for Q2 of 2005 was $1,091 million, versus $1,094 million in Q2 2004. Total product revenues, without services, were $1,028 million in Q2 of 2005 vs. $1024 million in the same quarter of 2004.
Cadence Announces New Capabilities to Simplify and Accelerate PowerPC Design; Custom-Synthesized Design Approach Reduces Time to Market for PowerPC Designers The new approach results in up to a 30 percent increase in processor speed and a 40 percent reduction in chip area. Developed in close collaboration with IBM, the custom-synthesized approach provides a new schedule-performance tradeoff point for performance-minded SoC designers embedding PowerPC cores.
Other EDA News
Floorplan-Aware Automated Synthesis of Bus-based Communication Architectures - Technical Paper
Mentor Graphics HDL Designer Saves Months of Design Effort with Concurrent HDL Checking
Toshiba Tapes Out First UniversalArray Chip with Cadence Encounter; Cadence Encounter Digital IC Implementation Slashes Turnaround Time for Toshiba's New SoC Design Platform
FLEXBUS: A High-Performance System-on-Chip Communication Architecture with a Dynamically Configurable Topology - Technical Paper
Cadence and UMC Sign Agreement to Streamline Wireless Design in the Fabless Market; Companies to Develop Comprehensive Wireless Solution Using the Cadence Virtuoso Platform and UMC's RFCMOS Manufacturing Expertise
Mentor Graphics Announces Automotive Industry's Most Comprehensive Portfolio of Electrical/Electronic Design Tools
Magneti Marelli Reduces Design and Simulation Time Using Mentor Graphics SystemVision for Safety Function Simulation
Synopsys Design Solutions Enable Implementation and Deployment of ARM Cortex-A8 Processor to Licensees
Cache Coherence Support for NonShared Bus Architecture on Heterogeneous MPSoCs - Technical Paper
Reminder - Giga Scale IC Exhibits at FSA Expo, Promotes Early Chip Cost Estimation & Exploration
Cadence Senior Vice President, Industry Alliances, Jan Willis, to Present at the 2005 FSA Suppliers Expo & Conference
Cadence Aligns Capabilities for Consumer and Mobile Applications to Support ARM's Cortex-A8 Processor
ADVISORY/ VaST Systems Technology's Embedded Systems Design Automation Solutions at Freescale Technology Forums in Munich and Paris
Accelerated Technology's Nucleus Software and ARM's IEM Software Combine to Extend Battery Life in Portable Devices
Synopsys and X-FAB Team to Accelerate Analog Mixed-Signal IC Design
TSMC Announces Production-Ready 90nm X Architecture; Cadence X Architecture Design Solution Targets Nexsys(SM) Process
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