Linux Lunges into the Limelight

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Sonics & Flextronics Course - It may not be too late to sign up for this free seminar on Wednesday, May 21st (in Mountain View, CA) or on Thursday, May 22nd (in Westford, MA). The two companies are making a joint effort to teach you how to accelerate your product's time to market by discussing topics from concept through to volume manufacturing. (

SystemC Course - Forte Design Systems is offering a free on-line SystemC training course intended for designers who are investigating language alternatives for high-level design. Designers who complete the course will understand the fundamentals of SystemC and considerations affecting its choice as a language for high-level design. The comprehensive course can normally be completed in 4-6 hours and will cover methodology, language usage, as well as comparison of SystemC and C++. Content for the course was created in partnership between Forte and Willamette HDL. (


Astro Semiconductor is a new company being formally launched by Anjan (AJ) Sen (formerly an executive with eSilicon Corp.), and is an analog and mixed-signal IP company founded in January 2002. With the launch, Astro is announcing a series of physical layer (PHY) IP for the storage and communications markets, and analog IP for the consumer market. The company says the Astro technology combines a design approach known as Adaptive-Dynamic Biasing and a methodology that allows efficient porting of analog IP to any foundry that has a standard CMOS process. The company's “siliconized” analog IP includes the first storage product, a 1.5Gb/s Serial ATA PHY compliant with Gen 1 of the Serial ATA 1.0a specification. Astro also announced “a SPI-4 Phase 2 PHY and a HyperTransport PHY as part of its communication line of products and added a high-performance amplifier platform and PCI-X 1.0 I/O to its consumer product line.”

Sen said, “I formed Astro Semiconductor to deal with the challenges of designing and integrating robust, low-power, high-performance analog functionality into large, deep-submicron ICs. Bleeding-edge analog functionality demonstrated in a lab is a big step away from the end goal of delivering robust analog IP integrated into a large DSM ASIC that has a high yield and works to specification. Our analog products are proven to exceed performance expectations in real-world applications - even under the toughest noise conditions encountered in low-cost, mass-produced systems.”

Beach Solutions announced that the company has appointed Arthur Cook as CFO. Arthur Cook is a Fellow of the Institute of Chartered Accountants and has 25+ years' financial and general management experience in industries including transportation, trading, steel, and IT. He will report directly to Beach Solutions CEO Terry McCloskey.

Lanner Group has appointed Scott Dixon Smith as President of its U.S. operations. The company says Dixon Smith will also help lead an “aggressive expansion” into the rapidly growing business process management (BPM) market. Previously, Dixon Smith was one of the founders of Holosofx Inc., which was acquired in September 2002 by IBM. In 1989 through 1991, Dixon Smith served on the Malcolm Baldridge National Quality Award Committee and is a certified Malcolm Baldridge National Quality Award Examiner. He has a BA from Westminster College, an MS from the University of Alabama, and an MBA from Harvard.

Monterey Design Systems announced that Alan Feinberg has been named Vice President of North America sales, and will be responsible for all Monterey sales operations in the U.S. and Canada. Feinberg has 18+ years' sales and marketing experience in EDA. He was one of the earliest employees at Synopsys and opened the company's first field sales and became director of North American sales operations. He also held executive positions at ACEO Technology and Meta-Software prior to their respective acquisitions by Avanti Corp. Prior to joining Monterey, Feinberg was Founder and President of TEKSTART, a Silicon Valley based consulting firm. He has a BSEE and an MBA. Feinberg periodically writes articles for the San Jose Mercury News as a member of the publications Board of Contributors.

ReShape, Inc. announced the appointment of Joe Mastroianni as Vice President of Engineering. Previously, Mastroianni was vice president of product development at Adaptive Silicon. Prior to ASI, he was with Cadence Design Systems for 10 years, most recently as vice president of design methodology engineering. Mastroianni also spent two years at Intel and seven years as a member of the technical staff at the RCA Microelectronics Center. Mastroianni has a BSEE and an MSEE from Rutgers University. He has published several science fiction short stories and his first novel will be published in the spring of 2005. A partner in Magee Scientific, he was formerly with an expeditionary team funded by the National Science Foundation to research the use of alternative energy on Antarctica. While on Antarctica, he designed, constructed, and deployed an 802.11x network for harsh climates. David Gregory, President and CEO of ReShape, said, “We searched the world from top to bottom to find someone of Joe's caliber and we found him in Antarctica.”

In the category of ...

Issues at DAC - Revitalizing Silicon Valley and EDA

No matter that DAC will be in Anaheim, you're going to hear conversation in Southern California about what's going on in Northern California. To many observers, Silicon Valley is the epicenter of the EDA industry, but the bloom's off the rose, so to speak, in Silicon Valley these days. Jacques Benkoski, President and CEO at Monterey Design, expresses some strong opinions here on what needs to be done if EDA and Silicon Valley are going to rise and shine once again.

“We're seeing a switch, at this point, to a different growth pattern in the semiconductor industry. Carly Fiorina (CEO at Hewlett-Packard) was saying last week that although we're accustomed to have electronics revenue growth at 5x GNP [gross national product], going forward we're going to have to settle for 2x GNP.”

“Think about it. At 5x GNP growth, we could rush forward, concerned only about saving time and producing the latest, greatest product. There was no concern about the cost [of product development] and there was a ton of investment at the beginning of the product cycle.”

“But in a 2x GNP economy, the cost of development quickly becomes relatively more important than the time to market. In fact, you'll see today that most products are reaching their downward price slope even before they reach their [full market] volume. By the time anything's adopted or selling, the margins are not there - or the product's not being bought at all.”

“Look at 802.11. It will probably have as much impact on lifestyle as any technology over time, but is anybody making money out of it? No.”

“[Clearly] the semiconductor industry has to start looking at other industries now for our growth models - mature industries that grow at a more moderate pace. In the automobile industry for instance, they spend a lot more time planning and test-marketing a product before making the decision to manufacture it - and the overall product cycle is a lot slower. More importantly, car manufacturers, try to amortize R&D costs over multiple products.”

“Which is exactly comparable to IP reuse in the semiconductor industry and something we need to pay attention to. EDA has a key role to play in the IP integration mechanism and we can look at the car industry for guidance here as well. In fact, [similar to the way things are done in the automobile industry], we're seeing some of our customers today planning whole families of products before even launching the first one, based on IP reuse.”

“The ability to model products is even more important when it's so expensive to design and manufacture the products. FPGAs fit into the business picture here because contraction means the [overall] production volume is down. System manufacturers can use an FPGA as a step in the design process today, and as an important step in the early manufacturing phase of a product as well - [especially] when you don't want to commit to volume production until you know there's a market for the product. We're seeing systems guys creating boards with FPGAs and willing to go out into the market and lose money, [with the express purpose of] seeing if the product warrants the cost of the ASIC-based version. But the only way to make money in volume is to use silicon integration, however, and our job is to enable that effectively.”

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