Mentor Graphics Announces That UMC Has Adopted the TestKompress Embedded Compression Solution for Manufacturing Test

WILSONVILLE, Ore.—(BUSINESS WIRE)—March 24, 2005— Mentor Graphics Corporation (Nasdaq: MENT) today announced that its TestKompress(R) embedded deterministic test (EDT(TM)) tool has been adopted by UMC, a world leading semiconductor foundry, for use in 90 and 130 nanometer (nm) reference flows. The TestKompress tool has proven to reduce manufacturing test time by up to 100x compared to other test alternatives, helping users increase test coverage and test quality on their complex devices without compromising test time or test cost.

"TestKompress has shown that it can deliver outstanding test performance for complex devices while maintaining reasonable cost," said Ken Liou, director of the IP Development and Design Support Division at UMC. "TestKompress adheres to our commitment to provide customers with services and methodologies for optimal silicon development, and we are pleased to offer it to customers using our 130 and 90nm flows."

Throughout trials at UMC, the TestKompress tool has demonstrated an ability to reduce test time and data size by 80x and achieve 99 percent test coverage. The tool delivers test quality and low-test-cost benefits of embedded compression with relatively little impact on methodologies and design effort. It fits into any scan-based design flow, and features robust x-state tolerance that eliminates the need to add logic or adhere to strict design requirements imposed by the test structures. Additionally, the TestKompress tool includes at-speed test capabilities to improve detection of speed-related defects at smaller process technologies.

"Over the years, UMC has been among the first to invest in technologies that help its customers manufacture reliable devices at the lowest cost," said Robert Hum, vice president and general manager of the Design Verification and Test division for Mentor Graphics. "UMC's decision to adopt TestKompress suggests that the tool is approaching critical mass as the industry standard for embedded compression."

About Mentor Graphics Design-for-Test Tools

Mentor Graphics provides the industry's broadest portfolio of DFT solutions for today's System-on-Chip and deep submicron designs, including integrated solutions for scan, ATPG, EDT, advanced memory test, boundary scan, logic built-in self-test and a variety of DFT-related flows. For more information visit www.mentor.com/products/dft.

About Mentor Graphics

Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of over $700 million and employs approximately 3,850 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: http://www.mentor.com/.

Mentor Graphics and TestKompress are registered trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.



Contact:
Mentor Graphics Corporation, Wilsonville
Nate James, 503-685-0449

Email Contact
Suzanne Graham, 503-685-7789

Email Contact



Review Article Be the first to review this article
CST: Webinar November 9, 2017

Synopsys: Custom Compiler

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
DVCon Europe 2017: Munich and So much more
More Editorial  
Jobs
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
Upcoming Events
25th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2017) at Yas Viceroy Abu Dhabi Yas Marina Circuit, Yas Island Abu Dhabi United Arab Emirates - Oct 23 - 25, 2017
ARM TechCon 2017 at Santa Clara Convention Center Santa Clara CA - Oct 24 - 26, 2017
MIPI DevCon Bangalore 2017 at The Leela Palace Bengaluru India - Oct 27, 2017
MIPI DevCon Hsinchu City 2017 at Sheraton Hsinchu Hotel Taiwan - Oct 31, 2017
CST: Webinar series



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise