Celoxica Joins Synopsys in-Sync Program for Verification And Implementation

System-level and Custom IP Designers Benefit From Flow Development Connecting Celoxica's Suite of ESL Design Tools to the Synopsys Design Compiler Family

ABINGDON, England—(BUSINESS WIRE)—Jan. 20, 2005— Celoxica, a leading provider of C-based design and synthesis solutions, today announced design flow development through the Synopsys(R) (Nasdaq:SNPS) in-Sync(R) program. This development formalizes the interoperability between Celoxica's Agility Compiler and DK Design Suite with the Design Compiler(R) synthesis solution from Synopsys, Inc.

Celoxica's design tools for system level co-design and the rapid development of custom intellectual property cores from C-algorithms, enable designers to retain their single source C files through design exploration, verification and implementation. Celoxica's ESL approach provides the capability for the automatic generation and synthesis of IEEE compliant RT level VHDL, Verilog and FPGA netlists from ANSI-C or SystemC algorithmic descriptions.

"Celoxica's tools have become a distinctive part of the ASIC/SoC design flow, now that it connects to the leading hardware implementation flow," said Jeff Jussel, vice president of Marketing for Celoxica. "Linking the Celoxica ESL tools to Synopsys' Design Compiler tools is an important step in realizing the full potential of ESL design."

The development and verification of tool interoperability is being managed through the Synopsys in-Sync program. The initial focus is the optimization of RTL generated from Celoxica's tools for Design Compiler tools.

"For years Synopsys has initiated programs of its own and worked with standards bodies and industry organizations to advance tool interoperability throughout the electronic design automation industry," said Karen Bartleson, director of Interoperability at Synopsys, Inc. "Through the in-Sync interoperability program, Synopsys enables EDA vendors to identify and implement interoperable design flows that maximize the productivity of our mutual customers."

About Celoxica

An innovator in Electronic System Level (ESL) design, Celoxica supplies the design technology, IP and services that define Software-Compiled System Design, a methodology that exploits higher levels of design abstraction to dramatically improve silicon design productivity. Celoxica's products address hardware/software partitioning, co-verification and C-based synthesis. Established in 1996, Celoxica offers a proven route from complex algorithms to hardware, and provides a portfolio of ESL design tools that deliver significant productivity advantages for digital signal processing applications such as imaging, electronic security and communications. For more information, visit: www.celoxica.com.

Celoxica and the Celoxica logo are trademarks of Celoxica, Ltd. Synopsys, Design Compiler and in-Sync are registered trademarks of Synopsys, Inc. All other brand names and product names are the property of their respective owners.



Contact:
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Jeff Jussel, 512-795-8170             

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Karen Tyrrell, 650-366-8212 ext. 204            

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