Synopsys' Magellan Deployed by NVIDIA to Maximize Verification Productivity on Next-Generation Graphics Processing Units

Magellan Enables Rapid and Thorough Block-Level Verification

MOUNTAIN VIEW, Calif., Oct. 27 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), the solutions leader in semiconductor design software, today announced that NVIDIA Corporation, a leading provider of visual processing solutions, has adopted Synopsys' Magellan(TM) hybrid RTL formal verification tool to shorten design cycles of their next-generation graphics processing unit (GPU). Magellan's ability to find deep corner-case bugs, power to deliver proofs without manual intervention, and ease of adoption were key factors in NVIDIA's decision to deploy Magellan.

"We need to streamline the verification process to meet our highly compressed design cycle," said Dan Smith, director of Hardware Engineering at NVIDIA. "Magellan has enabled our engineers to verify their design blocks extensively, finding complex design bugs before going into full-chip simulation. The ability to find these bugs earlier in the verification process is essential to meet our aggressive chip development schedules."

NVIDIA, an early adopter of assertion-based verification methodology, has created a library of assertions to pinpoint bugs more efficiently in their dynamic verification environment. Magellan complements this environment by reusing the assertions to prove complex design behavior and find deep corner-case bugs missed by traditional techniques. As a result, Magellan fits easily into NVIDIA's existing verification flow, allowing their engineers to apply rigorous verification technologies and raise the quality of their design.

"Magellan's hybrid architecture has found corner-case bugs several thousand cycles deep in our designs, unlike tools using pure formal engines that can only search a few hundred cycles deep," said Prosenjit Chatterjee, verification lead at NVIDIA. "Additionally, Magellan is able to prove many complex properties without manual intervention, and hence is ideal for deploying property verification across a regression farm to maximize productivity."

"Verification of leading-edge designs, such as NVIDIA's GPUs, requires innovative technologies to find complex bugs," said Swami Venkat, director of RTL Verification Marketing at Synopsys, Inc. "Magellan's hybrid architecture uniquely combines dynamic and high-capacity formal proof engines to increase verification confidence."

About Synopsys

Synopsys, Inc. is the solutions leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/ .

NOTE: Synopsys is a registered trademark and Magellan is a trademark of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

CONTACT: media, Carole Murchison of Synopsys, Inc., +1-650-584-4632, or
Email Contact; or Sarah Seifert of Edelman, +1-650-968-4033, or
Email Contact, for Synopsys, Inc.

Web site: http://www.synopsys.com/




Review Article Be the first to review this article

Aldec Simulator Evaluate Now

Featured Video
Jobs
ASIC Hardware Engineer for BAE Systems Intelligence & Security at Arlington, VA
ASIC Design Engineer for Infinera Corp at Sunnyvale, CA
Acoustic Systems Test Engineer for Cirrus Logic, Inc. at Austin, TX
Senior PIC Test Development Engineer for Infinera Corp at Sunnyvale, CA
Principal PIC Hardware Controls Engineer for Infinera Corp at Sunnyvale, CA
Design Verification Engineer for Cirrus Logic, Inc. at Austin, TX
Upcoming Events
IC Open Innovation Panel During REUSE 2017 at Santa Clara Convention Center 5001 Great America Parkway Santa Clara CA - Dec 14, 2017
Essentials of Electronic Technology: A Crash Course at Columbia MD - Jan 16 - 18, 2018
Essentials of Digital Technology at MD - Feb 13 - 14, 2018
CST: Webinar series



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise