Cadence Recognized with Four TSMC Partner of the Year Awards

Highlights:

SAN JOSE, Calif., Sept. 27, 2016 — (PRNewswire) — Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that it has received four TSMC Partner of the Year awards at this year's TSMC Open Innovation Platform® (OIP) Ecosystem Forum. Cadence was presented with awards for the joint delivery of the 7nm mobile design platform, the 7nm High Performance Computing (HPC) design platform, the Integrated Fan-Out (InFO) design solution and its analog/mixed-signal IP.

Cadence Logo.

The awards for the joint delivery of the 7nm mobile design platform and the 7nm HPC design platform were given based on the early, in-depth collaboration between TSMC and Cadence on FinFET enablement and the development of this latest advanced-node technology for next-generation system-on-chip (SoC) designs. Cadence secured the award for the delivery of a comprehensive solution for InFO based technologies by integrating IC back-end design with advanced packaging solutions for wafer-level fan-out design, analysis and verification. Finally, the analog/mixed-signal IP award was given based on customer feedback, portfolio breadth, strong technical support capabilities and customer adoption/production volume.

"Cadence continues to partner with TSMC to deliver the innovation and deep technical expertise that is required to address evolving challenges with the latest process nodes such as 7nm and advances in packaging technology such as InFO," said Dr. Anirudh Devgan, senior vice president and general manager of the the Digital Design & Signoff Group and the System & Verification Group and at Cadence. "These awards from TSMC highlight Cadence's ability to offer top-of-the-line tools and IP that our customers need for advanced SoC designs."

"Throughout the history of our long collaborative relationship with Cadence, they have consistently delivered quality results and continue to invest in the latest technologies and most advanced nodes as demonstrated by its latest 7nm mobile design platform, 7nm HPC design platform, InFO design solution and analog/mixed-signal IP," said Suk Lee, senior director of the Design Infrastructure Marketing Division at TSMC. "We are pleased to present these awards to Cadence and look forward to continuing to partner together on more innovative solutions that our mutual customers demand in the years to come."

About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry. More information about the company, its products and its services is available at www.cadence.com.

© 2016 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective holders.

For more information, please contact:
Cadence Newsroom
408-944-7039
Email Contact

Logo - http://photos.prnewswire.com/prnh/20140102/SF39436LOGO

 

To view the original version on PR Newswire, visit: http://www.prnewswire.com/news-releases/cadence-recognized-with-four-tsmc-partner-of-the-year-awards-300335058.html

SOURCE Cadence Design Systems, Inc.

Contact:
Cadence Design Systems, Inc.
Web: http://www.cadence.com




Review Article Be the first to review this article

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
H-1B Visa: de Geus’ tragedy looms large
Peggy AycinenaIP Showcase
by Peggy Aycinena
IP for Cars: Lawsuits are like Sandstorms
More Editorial  
Jobs
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
ASIC/FPGA Design Engineer for Palo Alto Networks at Santa Clara, CA
Mechanical Designer/Engineer for Palo Alto Networks at Santa Clara, CA
Lead Java Platform Engineer IOT-WEB for EDA Careers at San Francisco Area, CA
Technical Support Engineer for EDA Careers at Freemont, CA
Staff Software Engineer - (170059) for brocade at San Jose, CA
Upcoming Events
Embedded Systems Conference ESC Boston 2017 at Boston Convention & Exhibition Center Boston MA - May 3 - 4, 2017
2017 GPU Tech Conference at San Jose McEnery Convention Center 150 West San Carlos Street San Jose CA - May 8 - 11, 2017
High Speed Digital Design and PCB Layout at 13727 460 Ct SE North Bend WA - May 9 - 11, 2017
Nanotech 2017 Conference & Expo at Gaylord National Hotel & Convention Center WA - May 14 - 17, 2017
DAC2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy