JEDEC Announces Annual Serial Presence Detect Enhancements

ARLINGTON, Va., USA – AUGUST 16, 2016 –  JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, has announced that its JC-45 Committee has approved the 2016 annual release of codes for the Serial Presence Detect (SPD) for DDR4/DDR4E and for LPDDR3/LPDDR4.  The SPD is an EEPROM present on all JEDEC standard memory modules that contains codes read by the host computer to determine critical functions and timing supported by the memory module.  SPD4.1.2.L-4 (for DDR4/DDR4E) and  SPD4.1.2.M-2 (for LPDDR3/LPDDR4) are both available for free download from the JEDEC website.

“Embedded SPD codes in solder down applications have also become exceptionally popular in computing devices,” said Mian Quddus, Chairman of the JC-45 Committee on DRAM Modules.  “This annual release of new SPD codes helps the industry keep abreast of the latest DRAM advances while maintaining backward compatibility.”

The 2016 release of the DDR4 SPD Contents specification includes support for second generation Registered modules and Load Reduced modules, with increases in operation speed to 3200 Mbps through addition of Decision Feedback Equalization control bytes.  The SPD revision level remains unchanged for UDIMMs at revision 1.1, however revision levels for other modules types have increased: RDIMM and LRDIMM module SPD revisions increase to revision 1.2 and the revision for NVDIMMs increases to revision 1.1.

The 2016 release of the LPDDR3/LPDDR4 SPD Contents also changes the revision levels to 1.1 with the addition of support for a greater number of channels for high capacity, high throughput systems.

About JEDEC

JEDEC is the global leader in the development of standards for the microelectronics industry. Thousands of volunteers representing nearly 300 member companies work together in 50 JEDEC committees to meet the needs of every segment of the industry, manufacturers and consumers alike. The publications and standards generated by JEDEC committees are accepted throughout the world.  All JEDEC standards are available for free download from the JEDEC website. For more information, visit  www.jedec.org.

 


Contact:

Emily Desjardins
Email Contact
+1 703-907-7560




Review Article Be the first to review this article
Aldec Webinar Nov 30

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Computer History Museum: the Future of War is Here
More Editorial  
Jobs
Senior PIC Test Development Engineer for Infinera Corp at Sunnyvale, CA
ASIC Design Engineer for Infinera Corp at Sunnyvale, CA
Principal PIC Hardware Controls Engineer for Infinera Corp at Sunnyvale, CA
Senior SW Developer for EDA Careers at San Jose, CA
REVISED***Director Product Line RF/IC for EDA Careers at San Jose, CA
Upcoming Events
“Empowering Leadership with WIT and WISDOM” at SEMI 673 South Milpitas Blvd. Milpitas CA - Nov 28, 2017
Artificial Intelligence and Convolution Neural Networks Discussion at San Jose State University Student Union Theater San Jose CA - Dec 4, 2017
Silicon Valley's Only Comprehensive Embedded Systems Conference at San Jose Convention Center 150 W. San Carlos St. San Jose CA - Dec 5 - 7, 2017
Oski Technology’s Decoding Formal Club Meeting at The Conference Center San Jose CA - Dec 7, 2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise