ARM Expands Cycle Model Portfolio with Support for SystemC

EDA collaborations to broaden adoption and enable faster development

Cambridge, UK, June 2, 2016 – ARM announced today the availability of cycle-accurate models of ARM® processor and system intellectual property (IP) with support for industry standard SystemC. Previously only available for use in ARM SoC Designer, ARM Cycle Models now integrate with SystemC environments including commercial offerings from Cadence® and Synopsys, enabling partners to begin their system design and prototyping earlier using a wide range of popular development environments.

"Early SoC architectural exploration and performance estimation have become essential to meet the industry's ever increasing demands on performance," said Javier Orensanz, general manager, development solutions group, ARM. "I am very pleased to extend our collaboration with our EDA partners to include Cycle Models, and together enable the success of the next generation of ARM-powered devices."

ARM Cycle Models have already been used successfully in multiple SystemC virtual prototypes including an automotive SoC design featuring an ARM Cortex®-A53 and Cortex-M7, and a 5G baseband SoC that incorporates a Cortex-R8. In addition, all future Cycle Models will be released with SystemC support.

Broadening Ecosystem Adoption

"Integrating ARM Cycle Models with the Cadence Interconnect Workbench enables more efficient early SoC performance analysis and optimization," said Mike Stellfox, fellow, System & Verification Group at Cadence. "Through our collaboration with ARM, users can simply download a Cycle Model from the ARM IP Exchange and quickly verify system performance goals when simulating using the Incisive® Enterprise Simulator or in hybrid mode with the Palladium® Z1 enterprise emulation platform."

"The ability to run application workloads on cycle-accurate processor models is important to the validation of multicore SoC designs," said John Koeter, vice president of marketing for IP and prototyping at Synopsys. "The integration of ARM Cycle Models with Synopsys Platform Architect™ MCO's architecture analysis tool enables our customers to confirm their architecture design decisions earlier in the development cycle."

ARM Cycle Models provide both pin-level and TLM-2.0 interfaces to enable integration into a variety of environments. ARM's IP Exchange portal ( will be used to configure and compile future SystemC models, ensuring around-the-clock availability.

Select ARM Cycle Models with SystemC support are available today, including Cortex-M7, Cortex-A53 and Cortex-R8, with new models being added regularly.

Review Article Be the first to review this article
CST Webinar Series


Featured Video
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Acquiring Mentor: Four Good Ideas, One Great
More Editorial  
SENIOR ASIC Design Engineer for TiBit Communications at Petaluma, CA
Manager, Field Applications Engineering for Real Intent at Sunnyvale, CA
Upcoming Events
DeviceWerx - 2016 at Green Valley Ranch Casino & Resort Las Vegas NV - Nov 3 - 4, 2016
2016 International Conference On Computer Aided Design at Doubletree Hotel Austin TX - Nov 7 - 10, 2016
ICCAD 2016, Nov 7-10, 2016 at Doubletree Hotel in Austin, TX at Doubletree Hotel Austin TX - Nov 7 - 10, 2016
Electric&Hybrid Aerospace Technology Symposium 2016 at Conference Centre East. Koelnmesse (East Entrance) Messeplatz 1 Cologne Germany - Nov 9 - 10, 2016
S2C: FPGA Base prototyping- Download white paper

Internet Business Systems © 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy